IP Library Granted Patent US 9,374,051
Granted Patent B2
US 9,374,051 · App. 14/728,196 · Granted Jun 21, 2016

Phase shift and attenuation circuits for use with multiple-path amplifiers

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Quick Facts
Patent No.
US 9,374,051
App. No.
14/728,196
Granted
Jun 21, 2016
Kind
B2
Abstract

Embodiments of circuits for use with an amplifier that includes multiple amplifier paths include a first circuit and a second circuit in parallel with the first circuit. The first circuit includes a first input coupled to a first power divider output, a first output coupled to a first amplifier path of the multiple amplifier paths, and a first adjustable phase shifter and a first attenuator series coupled between the first input and the first output. The second circuit includes a second input coupled to a second power divider output, a second output coupled to a second amplifier path of the multiple amplifier paths, and a second adjustable phase shifter coupled between the second input and the second output.

Claims (45)

1. A circuit for use with an amplifier that includes multiple amplifier paths, the circuit comprising:

a first circuit comprising a first input coupled to a first power divider output, a first output coupled to a first amplifier path of the multiple amplifier paths, and a first adjustable phase shifter and a first attenuator series coupled between the first input and the first output;

a second circuit in parallel with the first circuit, the second circuit comprising a second input coupled to a second power divider output, a second output coupled to a second amplifier path of the multiple amplifier paths, and a second adjustable phase shifter coupled between the second input and the second output; and

a controller configured to receive data indicating phase shifts to be applied by the first and second adjustable phase shifters, and to control, based on the data, the phase shifts applied by the first and second adjustable phase shifters.

2. The circuit of claim 1 , wherein the first attenuator is an adjustable attenuator.

3. The circuit of claim 2 , wherein the first attenuator is digitally controlled and has a plurality of states.

4. The circuit of claim 1 , wherein the second circuit further comprises a second attenuator coupled in series with the second adjustable phase shifter.

5. The circuit of claim 4 , wherein the second attenuator is an adjustable attenuator.

6. The circuit of claim 5 , wherein the second attenuator is digitally controlled and has a plurality of states.

7. The circuit of claim 4 , wherein the second attenuator is configured to apply zero decibels of attenuation.

8. The circuit of claim 1 , further comprising:

a power divider with a power divider input, the first power divider output, and the second power divider output, wherein the power divider is configured to divide a radio frequency (RF) signal received at the power divider input into two RF signals provided at the first and second power divider outputs.

9. The circuit of claim 8 , further comprising:

a fixed phase shifter configured for adding a fixed phase shift between the two RF signals provided at the first and second power divider outputs.

10. A circuit for use with an amplifier that includes multiple amplifier paths, wherein the amplifier is a Doherty power amplifier comprising a main amplifier path and a peaking amplifier path, the circuit comprising:

a first circuit comprising a first input coupled to a first power divider output, a first output coupled to a first amplifier path of the multiple amplifier paths, and a first adjustable phase shifter and a first attenuator series coupled between the first input and the first output, and wherein the first output is coupled to the main amplifier path;

a second circuit in parallel with the first circuit, the second circuit comprising a second input coupled to a second power divider output, a second output coupled to a second amplifier path of the multiple amplifier paths, and a second adjustable phase shifter coupled between the second input and the second output, and wherein the second output is coupled to the peaking amplifier path; and

a controller configured to receive data indicating phase shifts to be applied by the first and second adjustable phase shifters, and to control, based on the data, the phase shifts applied by the first and second adjustable phase shifters.

11. A circuit for use with an amplifier that includes multiple amplifier paths, the circuit comprising:

a first circuit comprising a first input coupled to a first power divider output, a first output coupled to a first amplifier path of the multiple amplifier paths, and a first adjustable phase shifter and a first attenuator series coupled between the first input and the first output;

a second circuit in parallel with the first circuit, the second circuit comprising a second input coupled to a second power divider output, a second output coupled to a second amplifier path of the multiple amplifier paths, and a second adjustable phase shifter coupled between the second input and the second output;

a third series circuit in parallel with the first and second series circuits, the third series circuit comprising a third input coupled to a third power divider output, a third output coupled to a third amplifier path of the multiple amplifier paths, and a third adjustable phase shifter and a third attenuator series coupled between the third input and the third output; and

a controller configured to receive data indicating phase shifts to be applied by the first and second adjustable phase shifters, and to control, based on the data, the phase shifts applied by the first and second adjustable phase shifters.

12. The circuit of claim 11 , further comprising:

a power divider with a power divider input, the first power divider output, the second power divider output, and the third power divider output, wherein the power divider is configured to divide a radio frequency (RF) signal received at the power divider input into three RF signals provided at the first, second, and third power divider outputs.

13. The circuit of claim 11 , wherein the amplifier is a Doherty power amplifier comprising a main amplifier path, a first peaking amplifier path, and a second peaking amplifier path, and wherein the first output is coupled to the main amplifier path, the second output is coupled to the first peaking amplifier path, and the third output is coupled to the second peaking amplifier path.

14. The circuit of claim 1 wherein the first adjustable phase shifter and the second adjustable phase shifter are digitally controlled and each has a plurality of states.

15. The circuit of claim 1 , further comprising:

an interface, wherein the controller is configured to receive the data indicating the phase shifts to be applied via the interface.

16. The circuit of claim 15 , wherein the interface is selected from a serial interface and a serial peripheral interface.

17. A circuit for use with an amplifier that includes multiple amplifier paths, the circuit comprising:

a first circuit comprising a first input coupled to a first power divider output, a first output coupled to a first amplifier path of the multiple amplifier paths, and a first adjustable phase shifter and a first attenuator series coupled between the first input and the first output;

a second circuit in parallel with the first circuit, the second circuit comprising a second input coupled to a second power divider output, a second output coupled to a second amplifier path of the multiple amplifier paths, and a second adjustable phase shifter coupled between the second input and the second output;

a controller configured to receive data indicating phase shifts to be applied by the first and second adjustable phase shifters, and to control, based on the data, the phase shifts applied by the first and second adjustable phase shifters; and

an interface, wherein the controller is configured to receive the data indicating the phase shifts to be applied via the interface, wherein at least one of the first and second attenuators is an adjustable attenuator, and wherein the controller is further configured to receive, via the interface, data indicating attenuation levels to be applied by the at least one of the first and second attenuators, and to control, based on the data, the attenuation levels applied by the at least one of the first and second attenuators.

18. The circuit of claim 17 , wherein the data includes a multiple-bit value that uniquely specifies one of multiple states for the first and second adjustable phase shifters and attenuation levels to be applied by the at least one of the first and second adjustable attenuators.

19. A circuit for use with an amplifier that includes multiple amplifier paths, the circuit comprising:

a first circuit comprising a first input coupled to a first power divider output, a first output coupled to a first amplifier path of the multiple amplifier paths, and a first adjustable phase shifter and a first attenuator series coupled between the first input and the first output; and

a second circuit in parallel with the first circuit, the second circuit comprising a second input coupled to a second power divider output, a second output coupled to a second amplifier path of the multiple amplifier paths, and a second adjustable phase shifter coupled between the second input and the second output,

wherein the amplifier is a Doherty power amplifier comprising a main amplifier path and a peaking amplifier path, and wherein the first output is coupled to the main amplifier path, and the second output is coupled to the peaking amplifier path.

20. A circuit for use with an amplifier that includes multiple amplifier paths, the circuit comprising:

a power divider with a power divider input, a first power divider output, and a second power divider output, wherein the power divider is configured to divide a radio frequency (RF) signal received at the power divider input into two RF signals provided at the first and second power divider outputs;

a first circuit comprising a first input coupled to the first power divider output, a first output coupled to a first amplifier path of the multiple amplifier paths, and a first adjustable phase shifter and a first attenuator series coupled between the first input and the first output;

a second circuit in parallel with the first series circuit, the second circuit comprising a second input coupled to the second power divider output, a second output coupled to a second amplifier path of the multiple amplifier paths, and a second adjustable phase shifter coupled between the second input and the second output; and

a controller configured to receive data indicating phase shifts to be applied by the first and second adjustable phase shifters, and to control, based on the data, the phase shifts applied by the first and second adjustable phase shifters.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →