IP Library Granted Patent US 9,570,325
Granted Patent B2
US 9,570,325 · App. 14/738,937 · Granted Feb 14, 2017

Packaged semiconductor devices having ribbon wires

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Quick Facts
Patent No.
US 9,570,325
App. No.
14/738,937
Granted
Feb 14, 2017
Kind
B2
Abstract

A packaged semiconductor device, such as a power QFN device, has (rectangular) ribbon wires, instead of circular bond wires. A proximal end of each ribbon wire is connected to a pad on an IC die, and a distal end of each ribbon wire forms a device lead. The die and the ribbon wires are encapsulated in a molding compound with a side of each device lead exposed. Such devices can be assembled without using lead frames. The omission of lead frames and the use of ribbon wires enable assembly of smaller devices having enhanced thermal dissipation capabilities.

Claims (18)

1. A method for assembling a packaged semiconductor device, the method comprising:

(a) mounting a die onto a substrate using an adhesive;

(b) bonding a plurality of ribbon wires between the die and the adhesive, wherein:

(b1) a proximal end of each ribbon wire is connected to a bonding pad of the die; and

(b2) a distal end of each ribbon wire is connected to the adhesive;

(c) applying molding compound to encapsulate the die and the plurality of ribbon wires; and

(d) removing the substrate and the adhesive to expose a side of the distal end of each ribbon wire to form a lead of the device.

2. The method of claim 1 , wherein no lead frame is used to assemble the device.

3. The method of claim 1 , wherein removing the substrate also exposes a bottom side of the die.

4. The method of claim 1 , wherein the device is a Quad Flat No Lead (QFN) device.

5. The method of claim 1 , wherein the device is a power device.

6. The method of claim 1 , wherein:

mounting the die on the substrate comprises mounting the die having a conducting or insulating element attached to a bottom side of the die; and

removing the substrate exposes a bottom side of the conducting or insulating element.

7. The packaged semiconductor device assembled using the method of claim 6 .

8. The method of claim 1 , wherein the device is a power QFN device.

9. The packaged semiconductor device assembled using the method of claim 1 .

10. The method of claim 1 , wherein connecting the distal end of each ribbon wire to the adhesive comprises pressing a bottom side of the distal end of each ribbon wire into the adhesive.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →