IP Library Granted Patent US 9,720,296
Granted Patent B2
US 9,720,296 · App. 14/750,522 · Granted Aug 1, 2017

Display panel

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Quick Facts
Patent No.
US 9,720,296
App. No.
14/750,522
Granted
Aug 1, 2017
Kind
B2
Abstract

A display panel is provided. The display panel includes a first substrate, a first insulating layer, a common electrode, a second insulating layer, a first pixel electrode, and a second pixel electrode. The first insulating layer is located on the first substrate. The common electrode having a first through hole is located on the first insulating layer. The second insulating layer covers the common electrode and partially covers the first through hole. The first pixel electrode is located on the second insulating layer and penetrates through the first through hole. The second pixel electrode is located on the second insulating layer. The second pixel electrode is adjacent to the first pixel electrode and overlaps a portion of the first through hole.

Claims (28)

1. A display panel, comprising:

a first substrate;

a first insulating layer located on the first substrate;

a common electrode, located on the first insulating layer, the common electrode having a first through hole;

a second insulating layer, located on the common electrode, the second insulating layer covering the common electrode and partially covering the first through hole;

a first pixel electrode located on the second insulating layer, wherein the first pixel electrode penetrates through the first through hole; and

a second pixel electrode located on the second insulating layer, wherein the second pixel electrode is adjacent to the first pixel electrode and overlaps a portion of the first through hole, and

wherein the second pixel electrode includes a slit, the slit and the first through hole are separated by a first distance, the second pixel electrode extends over the first through hole a second distance, and the first distance is larger than the second distance.

2. The display panel according to claim 1 , wherein the first pixel electrode and the second pixel electrode are separated by a third distance, and the third distance is larger than the second distance.

3. The display panel according to claim 2 , wherein the third-distance is 2.0-5.0 μm.

4. The display panel according to claim 2 , wherein the second distance is 0.1-1.0 μm.

5. The display panel according to claim 1 , wherein the first distance is 2.0-5.0 μm.

6. The display panel according to claim 1 , wherein a first area defined by an overlapping area of an orthogonal projection of the first pixel electrode on the first substrate and an orthogonal projection of the first through hole on the first substrate is larger than a second area defined by an overlapping area of an orthogonal projection of the second pixel electrode on the first substrate and an orthogonal projection of the first through hole on the first substrate.

7. The display panel according to claim 1 , further comprising:

a scan line, wherein the scan line overlaps with a portion of the first pixel electrode and a portion of the second pixel electrode.

8. The display panel according to claim 1 , further comprising:

a scan line, wherein the scan line overlaps with a portion of the second pixel electrode.

9. The display panel according to claim 1 , wherein the second insulating layer has a second through hole, and the second through hole is located within the first through hole and smaller than the first through hole.

10. The display panel according to claim 9 , further comprising:

a metal layer, wherein the first pixel electrode is electrically connected to the metal layer through the second through hole.

11. The display panel according to claim 10 , further comprising:

a data line, wherein the metal layer is electrically connected to the data line.

12. The display panel according to claim 1 , further comprising:

a first transistor element and a first scan line located on the first substrate, wherein the first transistor element is controlled by the first scan line, and the first transistor element is electrically connected to the first pixel electrode; and

a second transistor element and a second scan line located on the first substrate, wherein the second transistor element is controlled by the second scan line, and the second transistor element is electrically connected to the second pixel electrode.

13. The display panel according to claim 1 , further comprising:

a second substrate; and

a liquid crystal layer located between the first substrate and the second substrate.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 18, 2024
From: INNOLUX CORPORATION
To: RED OAK INNOVATIONS LIMITED
Reel/Frame 069206/0903 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2015
From: YEN, CHUNG-WEN; LEE, TE-YU; HUANG, CHIEN-TA
To: INNOLUX CORPORATION
Reel/Frame 035907/0899 →