IP Library Granted Patent US 9,312,875
Granted Patent B1
US 9,312,875 · App. 14/751,195 · Granted Apr 12, 2016

Signal processing apparatus and method for processing a signal

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Quick Facts
Patent No.
US 9,312,875
App. No.
14/751,195
Granted
Apr 12, 2016
Kind
B1
Abstract

A signal processing apparatus is described comprising a sampling time control circuit configured to provide a sequence of digital values, each digital value specifying a sampling time of a sequence of sampling times, a sampling circuit configured to sample an input signal according to the sequence of sampling times to generate a sampling value of the input signal for each sampling time of the sequence of sampling times and a processing circuit configured to receive the sampling values and configured to process the sampling values based on the sampling times, wherein the sampling time control circuit is configured to introduce jitter into the sampling times, by varying the time intervals between adjacent sampling times.

Claims (29)

1. A signal processing apparatus comprising

a sampling time control circuit configured to provide a sequence of digital values, each digital value specifying a sampling time of a sequence of sampling times;

a sampling circuit configured to sample an input signal according to the sequence of sampling times to generate a sampling value of the input signal for each sampling time of the sequence of sampling times;

a processing circuit configured to receive the sampling values and configured to process the sampling values based on the sampling times, wherein the sampling time control circuit is configured to introduce jitter into the sampling times, by varying the time intervals between adjacent sampling times.

2. The signal processing apparatus of claim 1 , wherein the sampling time control circuit is configured to provide a plurality of digital values, wherein each digital value specifies an offset with respect to a respective sampling time of a predetermined grid of a plurality of points in time.

3. The signal processing apparatus of claim 2 , wherein the processing circuit is configured to generate further sampling values at the points in time of the predetermined grid of points in time by interpolation, extrapolation or both of the sampling values.

4. The signal processing apparatus of claim 1 , wherein the sampling time control circuit is configured to provide the sampling values as sampling values of the amplitude of the input signal.

5. The signal processing apparatus of claim 1 , wherein the sampling time control circuit is configured to determine the sequence of sampling times.

6. The signal processing apparatus of claim 5 , wherein the sampling time control circuit is configured to determine the sequence of sampling times by varying the time intervals between adjacent sampling times based on a quality measure of the sampling values.

7. The signal processing apparatus of claim 5 , wherein the processing circuit is configured to generate a digitized version of the input signal based on the sampling values and the sampling time control circuit is configured to determine the sequence of sampling times based on a quality measure of the digitized version of the input signal.

8. The signal processing apparatus of claim 7 , wherein the sampling time control circuit is configured to provide the quality measure based on an amount of jitter in the digitized version of the input signal.

9. The signal processing apparatus of claim 7 , wherein the sampling time control circuit is configured to provide the quality measure based on an amount of interference in the digitized version of the input signal.

10. The signal processing apparatus of claim 7 , wherein the processing circuit is configured to reconstruct transmission data from the digitized version of the input signal.

11. A method for processing a signal comprising

providing a sequence of digital values, each digital value specifying a sampling time of a sequence of sampling times;

sampling an input signal according to the sequence of sampling times to generate a sampling value of the input signal for each sampling time of the sequence of sampling times;

processing the sampling values based on the sampling times, and introducing jitter into the sampling times by varying the time intervals between adjacent sampling times.

12. The method of claim 11 , wherein each digital value specifies an offset with respect to a respective sampling time of a predetermined grid of a plurality of points in time.

13. The method of claim 11 , comprising determining the sequence of sampling times.

14. The method of claim 13 , comprising determining the sequence of sampling times by varying the time intervals between adjacent sampling times based on a quality measure of the sampling values.

15. The method of claim 13 , comprising generating a digitized version of the input signal based on the sampling values and determining the sequence of sampling times based on a quality measure of the digitized version of the input signal.

16. The method of claim 15 , wherein the quality measure is based on an amount of jitter in the digitized version of the input signal.

17. The method of claim 15 , wherein the quality measure is based on an amount of interference in the digitized version of the input signal.

18. A signal processing apparatus comprising

a sampling time control means for providing a sequence of digital values, each digital value specifying a sampling time of a sequence of sampling times;

a sampling means for sampling an input signal according to the sequence of sampling times to generate a sampling value of the input signal for each sampling time of the sequence of sampling times;

a processing means for receiving the sampling values and for processing the sampling values based on the sampling times wherein the sampling time control means is configured to introduce jitter into the sampling times, by varying the time intervals between adjacent sampling times.

19. The signal processing apparatus of claim 18 , wherein the sampling time control means is configured to provide a plurality of digital values, each digital value specifying an offset with respect to a respective sampling time of a predetermined grid of a plurality of points in time.

20. The signal processing apparatus of claim 18 , wherein the sampling time control unit is configured to vary a time interval between two subsequent sampling times of the sequence of sampling times over the sequence of sampling times.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 26, 2020
From: INTEL CORPORATION
To: APPLE INC.
Reel/Frame 053063/0028 →
CONFIRMATORY ASSIGNMENT Recorded Jun 25, 2020
From: INTEL IP CORPORATION
To: INTEL CORPORATION
Reel/Frame 053050/0866 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2015
From: DIAS, VICTOR DA FONTE
To: INTEL IP CORPORATION
Reel/Frame 035968/0573 →