IP Library Granted Patent US 9,747,040
Granted Patent B1
US 9,747,040 · App. 14/755,652 · Granted Aug 29, 2017

Method and system for machine learning for write command selection based on technology feedback

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Quick Facts
Patent No.
US 9,747,040
App. No.
14/755,652
Granted
Aug 29, 2017
Kind
B1
Abstract

Example embodiments of the present invention relate to methods, systems, and computer program products for reducing I/O latency in a storage system. The method include polling a storage system for values related to caching of I/Os in global memory for subsequent destaging to disk. The host then may determine respective write delay values for I/Os to be sent from a host communicatively coupled with the storage system according to the values related to caching of I/Os. The write delay values then may be applied to the I/Os at the host to delay sending of the I/Os by respective delay times from the host to the storage system.

Claims (49)

1. A method comprising:

polling a storage system for values related to caching of I/Os in global memory for subsequent destaging to disk;

determining respective write delay values for I/Os to be sent from a host communicatively coupled with the storage system according to the values related to caching of I/Os; and

applying the write delay values to the I/Os at the host to delay sending of the I/Os by respective delay times from the host to the storage system.

2. The method of claim 1 wherein the logical storage device is a tiered storage device having portions of the logical storage device stored on respective tiers of physical storage having respective storage latencies.

3. The method of claim 2 wherein polling a storage system for values related to caching of I/Os in global memory for subsequent destaging to disk comprises polling the storage system for a mapping of logical storage device blocks to underlying physical storage technology on which the logical storage device blocks are stored.

4. The method of claim 3 wherein determining respective write delay values for I/Os to be sent from a host communicatively coupled with the storage system according to the values related to caching of I/Os comprises determining the write delay values according to a relationship with a storage latency of the underlying physical storage technology to which each I/O is to be written.

5. The method of claim 3 wherein polling a storage system for values related to caching of I/Os in global memory for subsequent destaging to disk further comprises:

polling the storage system for cache utilization metrics; and

polling the storage system for storage system utilization metrics.

6. The method of claim 5 wherein determining respective write delay values for I/Os to be sent from a host communicatively coupled with the storage system according to the values related to caching of I/Os further comprises determining the write delay values according to the cache utilization metrics and the storage system utilization metrics.

7. The method of claim 5 wherein polling the storage system for cache utilization metrics comprises determining whether the cache has reached a write pending limit.

8. The method of claim 5 wherein polling a storage system for values related to caching of I/Os in global memory for subsequent destaging to disk further comprises polling the storage system for historical write performance metrics.

9. The method of claim 1 further comprising:

tracking I/O latency for I/Os from the host to the storage system; and

if the I/O latency tracked by the host is above a threshold:

polling the storage system for information regarding storage system cache utilization per logical storage device; and

polling the storage system for storage system utilization load.

10. The method of claim 9 further comprising:

sending the I/Os to the storage system for processing; and

continuing to track I/O latency for the I/Os sent to the storage system for processing.

11. A system comprising:

a host;

a storage system; and

memory storing computer program code that when executed on a processor of the host causes the host to perform the operations of:

polling a storage system for values related to caching of I/Os in global memory for subsequent destaging to disk;

determining respective write delay values for I/Os to be sent from a host communicatively coupled with the storage system according to the values related to caching of I/Os; and

applying the write delay values to the I/Os at the host to delay sending of the I/Os by respective delay times from the host to the storage system.

12. The system of claim 11 wherein the logical storage device is a tiered storage device having portions of the logical storage device stored on respective tiers of physical storage having respective storage latencies.

13. The system of claim 12 wherein polling a storage system for values related to caching of I/Os in global memory for subsequent destaging to disk comprises polling the storage system for a mapping of logical storage device blocks to underlying physical storage technology on which the logical storage device blocks are stored.

14. The system of claim 13 wherein determining respective write delay values for I/Os to be sent from a host communicatively coupled with the storage system according to the values related to caching of I/Os comprises determining the write delay values according to a relationship with a storage latency of the underlying physical storage technology to which each I/O is to be written.

15. The system of claim 13 wherein polling a storage system for values related to caching of I/Os in global memory for subsequent destaging to disk further comprises:

polling the storage system for cache utilization metrics; and

polling the storage system for storage system utilization metrics.

16. The system of claim 15 wherein determining respective write delay values for I/Os to be sent from a host communicatively coupled with the storage system according to the values related to caching of I/Os further comprises determining the write delay values according to the cache utilization metrics and the storage system utilization metrics.

17. The system of claim 15 wherein polling the storage system for cache utilization metrics comprises determining whether the cache has reached a write pending limit.

18. The system of claim 15 wherein polling a storage system for values related to caching of I/Os in global memory for subsequent destaging to disk further comprises polling the storage system for historical write performance metrics.

19. The system of claim 11 further comprising:

tracking I/O latency for I/Os from the host to the storage system; and

if the I/O latency tracked by the host is above a threshold:

polling the storage system for information regarding storage system cache utilization per logical storage device; and

polling the storage system for storage system utilization load.

20. The system of claim 19 further comprising:

sending the I/Os to the storage system for processing; and

continuing to track I/O latency for the I/Os sent to the storage system for processing.

21. A computer program product including a non-transitory computer readable storage having computer program code encoded thereon that, when executed on a processor of a computer, causes the computer to reduce I/O latency in a storage system, the computer program code comprising:

computer program code for polling a storage system for values related to caching of I/Os in global memory for subsequent destaging to disk;

computer program code for determining respective write delay values for I/Os to be sent from a host communicatively coupled with the storage system according to the values related to caching of I/Os; and

computer program code for applying the write delay values to the I/Os at the host to delay sending of the I/Os by respective delay times from the host to the storage system.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (044535/0109) Recorded May 20, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO WYSE TECHNOLOGY L.L.C.)
Reel/Frame 060753/0414 →
RELEASE OF SECURITY INTEREST AT REEL 044535 FRAME 0001 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; WYSE TECHNOLOGY L.L.C.
Reel/Frame 058298/0475 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
PATENT SECURITY AGREEMENT (NOTES) Recorded Nov 29, 2017
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; WYSE TECHNOLOGY L.L.C.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 044535/0109 →
PATENT SECURITY AGREEMENT (CREDIT) Recorded Nov 29, 2017
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; WYSE TECHNOLOGY L.L.C.
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 044535/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 1, 2017
From: BOWLIN, BRADLEY A; YU, RONG; DON, ARIEH; WU, PENG
To: EMC IP HOLDING COMPANY LLC
Reel/Frame 043158/0283 →