Memory system with garbage collection

1. A memory system comprising:

a nonvolatile memory; and

a controller configured to control the nonvolatile memory,

wherein the controller includes:

an access controller configured to control access to the nonvolatile memory, based on a first request which is issued from a host;

a processor configured to execute garbage collection for securing, on the nonvolatile memory, a free area for writing data in the nonvolatile memory, based on a second request which is issued from the host before the first request is issued; and

a scheduler configured to schedule the garbage collection by controlling the processor,

wherein the first request is a first command which requests write to the nonvolatile memory, and

the second request is a second command to execute the garbage collection before the first command is issued, the second command including a size of write data of the first command.

2. The memory system of claim 1 , wherein the scheduler is configured to control the processor in a manner to execute the garbage collection until the free area corresponding to the size of the write data in the second command is generated in the nonvolatile memory.

3. The memory system of claim 2 , wherein the access controller is configured to write the write data in the generated free area in the nonvolatile memory, based on the first command.

4. The memory system of claim 1 , wherein

the second command includes the size of the write data of the first command, and a write start time or hint information capable of specifying a write start time.

5. The memory system of claim 4 , wherein

the scheduler is configured to:

schedule next garbage collection such that garbage collection corresponding to the size of the write data is completed at or before the write start time described in the second command; and

schedule a start of the garbage collection such that the garbage collection is executed until the free area corresponding to the size of the write data is generated on the nonvolatile memory, and

the access controller is configured to write the write data in the free area in the nonvolatile memory, based on the first command.

6. The memory system of claim 1 , wherein

the second command includes the size of the write data of the first command, and flag information instructing execution or stopping of the garbage collection.

7. The memory system of claim 6 , wherein the host is configured to issue a third command for inquiring, before the first command is issued, about a size of the free area in the nonvolatile memory generated by the garbage collection, and to monitor a generation status of the free area.

8. The memory system of claim 7 , wherein the processor is configured to notify the host of the size of the free area in the nonvolatile memory generated by the garbage collection, and to issue a response to the third command.

9. The memory system of claim 8 , wherein the host is configured to issue the first command based on the size of the free area in the nonvolatile memory described in the response to the third command, and

the processor is configured to write the write data in the free area in the nonvolatile memory based on the issued first command.

10. The memory system of claim 1 , wherein the scheduler or the processor is configured to notify the host of an extended response to the second request.

11. An information processing system comprising:

a memory system including a nonvolatile memory; and

a host configured to drive the memory system and to request a predetermined operation,

wherein the memory system includes:

an access controller configured to control access to the nonvolatile memory based on a first request which is issued from the host; and

a processor configured to execute a background process for the nonvolatile memory based on a second request which is issued from the host before the first request is issued,

wherein the first request is a first command which requests write to the nonvolatile memory, and

the second request is a second command to execute the background process before the first command is issued, the second command including a size of write data of the first command.

12. The information processing system of claim 11 , wherein the memory system further includes a scheduler configured to schedule the background process by controlling the processor.

13. The information processing system of claim 12 , wherein the background process is garbage collection for securing, on the nonvolatile memory, a free area for writing data in the nonvolatile memory, and

the scheduler is configured to control the processor in a manner to execute the garbage collection until a size of the free area in the second command is generated in the nonvolatile memory.

14. The information processing system of claim 13 , wherein the access controller is configured to write the write data into the generated free area in the nonvolatile memory based on the first command.

15. The information processing system of claim 11 , wherein

the second command includes the size of the write data of the first command, and a write start time or hint information capable of specifying a write start time.

16. The information processing system of claim 15 , wherein

the memory system further includes a scheduler configured to schedule the background process by controlling the processor,

the background process is garbage collection for securing, on the nonvolatile memory, a free area for writing data in the nonvolatile memory,

the scheduler is configured to:

schedule next garbage collection such that garbage collection corresponding to the size of the write data is completed before the write start time described in the second command; and

schedule a start of the garbage collection such that the garbage collection is executed until the free area corresponding to the size of the write data is generated on the nonvolatile memory, and

the access controller is configured to write the write data in the free area in the nonvolatile memory based on the first command.

17. The information processing system of claim 11 , wherein the background process includes at least one of the following: block erase, patrol read and refresh process.

18. A memory system comprising:

a nonvolatile memory; and

a controller configured to control the nonvolatile memory,

wherein the controller includes:

an access controller configured to control access to the nonvolatile memory, based on a write command which is issued from a host;

a processor configured to:

notify the host of a size of a free area in the nonvolatile memory, based on a first command which is issued from the host before the write command is issued, the first command is a command for inquiring about the size of the free area in the nonvolatile memory;

execute garbage collection for securing, on the nonvolatile memory, a free area for writing data in the nonvolatile memory, based on a second command which is issued from the host before the write command is issued, the garbage collection being executed prior to reception of the write command, wherein the second command is a command to execute the garbage collection before the write command is issued, and the second command includes a size of write data of the write command, and flag information instructing execution of the garbage collection;

stop the garbage collection which is being executed, based on a third command which is issued from the host before the write command is issued, wherein the third command includes flag information instructing stopping of the garbage collection which is being executed.