IP Library Granted Patent US 10,114,949
Granted Patent B2
US 10,114,949 · App. 14/757,946 · Granted Oct 30, 2018

Techniques for monitoring integrity of OS security routine

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Quick Facts
Patent No.
US 10,114,949
App. No.
14/757,946
Granted
Oct 30, 2018
Kind
B2
Abstract

Various embodiments are generally directed to techniques for monitoring the integrity of an operating system (OS) security routine that checks the integrity of an OS and/or one or more application routines. An apparatus may include a first processor component to execute an operating system (OS) in a first operating environment within a processing device and to execute an OS security routine to recurringly verify an integrity of the OS; a challenge component within a second operating environment within the processing device that is isolated from the first operating environment to recurringly challenge the OS security routine to provide a measure of itself; and a response component within the second operating environment to analyze each measure provided by the OS security routine and an elapsed time to receive each measure from the OS security routine to verify an integrity of the OS security routine.

Claims (46)

1. An apparatus to support secure processing comprising:

a storage;

a hardware processor coupled to the storage and configured to:

execute an operating system (OS) in a first operating environment;

execute an OS security routine to recurringly verify an integrity of the OS;

execute a challenge routine in a second operating environment that is isolated from the first operating environment to recurringly challenge the OS security routine to provide a measure of the OS security routine; and

execute a response routine in the second operating environment to analyze each measure provided by the OS security routine and an elapsed time to receive each measure from the OS security routine to verify an integrity of the OS security routine;

a network interface coupled to the hardware processor; and

a security server,

wherein the response routine causes the hardware processor to receive a first measure from the OS security routine, to receive a first expected measure from the security server via the network interface, and to compare the first measure to the first expected measure to verify the integrity of the OS security routine, and

wherein the security server is configured to maintain a copy of the OS security routine and to measure the copy of the OS security routine to derive the first expected measure.

2. The apparatus of claim 1 , wherein the OS security routine causes the hardware processor, in response to each challenge from the challenge routine, to take a measure of the OS security routine and send the measure to the response routine.

3. The apparatus of claim 1 , wherein the OS security routine causes the hardware processor to modify a portion of the OS security routine after the first measure is taken of the OS security routine so that a second measure subsequently taken of the OS security routine will differ from the first measure, and wherein the security server is configured to independently modify the copy of the OS security routine and to measure the modified copy of the OS security routine to derive a second expected measure, and wherein the response routine causes the hardware processor to receive the second expected measure from the security server via the network interface and to compare the second measure to the second expected measure to again verify the integrity of the OS security routine.

4. The apparatus of claim 1 , wherein:

the storage provides a first portion for storing the OS and the OS security routine;

the storage provides a second portion that acts as a secure enclave for storing the second operating environment and that is separate from the first portion; and

the hardware processor is configured to restrict accesses attempted by the OS to second operating environment within the secure enclave.

5. The apparatus of claim 4 , the secure enclave comprises security microcode.

6. A method to support secure processing comprising:

executing, by a hardware processor, an operating system (OS) in a first operating environment;

executing, by the hardware processor, an OS security routine to recurringly verify an integrity of the OS;

executing, by the hardware processor, a challenge routine in a second operating environment that is isolated from the first operating environment to recurringly challenge the OS security routine to provide a measure of the OS security routine; and

executing, by the hardware processor, a response routine in the second operating environment to analyze each measure provided by the OS security routine and an elapsed time to receive each measure from the OS security routine to verify an integrity of the OS security routine,

wherein the response routine causes the hardware processor to receive a first measure from the OS security routine, to receive a first expected measure from a security server via a network interface, and to compare the first measure to the first expected measure to verify the integrity of the OS security routine, and

wherein the security server is configured to maintain a copy of the OS security routine and to measure the copy of the OS security routine to derive the first expected measure.

7. The method of claim 6 , wherein the OS security routine causes the hardware processor, in response to each challenge from the challenge routine, to take a measure of the OS security routine and send the measure to the response routine.

8. The method of claim 6 , wherein the OS security routine causes the hardware processor to modify a portion of the OS security routine after the first measure is taken of the OS security routine so that a second measure subsequently taken of the OS security routine will differ from the first measure, and wherein the security server is configured to independently modify the copy of the OS security routine and to measure the modified copy of the OS security routine to derive a second expected measure, and wherein the response routine causes the hardware processor to receive the second expected measure from the security server via the network interface and to compare the second measure to the second expected measure to again verify the integrity of the OS security routine.

9. The method of claim 6 , further comprising:

storing the OS and the OS security routine in a first portion of storage;

providing a second portion in the storage that acts as a secure enclave for storing the second operating environment and that is separate from the first portion; and

restricting accesses attempted by the OS to second operating environment within the secure enclave.

10. The method of claim 9 , the secure enclave comprises security microcode.

11. A non-transitory computer-readable medium containing computer-executable instructions that, when executed by a processor, cause the processor to perform a method to support secure processing, the method comprising:

executing an operating system (OS) in a first operating environment;

executing an OS security routine to recurringly verify an integrity of the OS;

executing a challenge routine in a second operating environment that is isolated from the first operating environment to recurringly challenge the OS security routine to provide a measure of the OS security routine; and

executing a response routine in the second operating environment to analyze each measure provided by the OS security routine and an elapsed time to receive each measure from the OS security routine to verify an integrity of the OS security routine,

wherein the response routine causes the processor to receive a first measure from the OS security routine, to receive a first expected measure from a security server via a network interface, and to compare the first measure to the first expected measure to verify the integrity of the OS security routine, and

wherein the security server is configured to maintain a copy of the OS security routine and to measure the copy of the OS security routine to derive the first expected measure.

12. The non-transitory computer-readable medium of claim 11 , wherein the OS security routine causes the processor, in response to each challenge from the challenge routine, to take a measure of the OS security routine and send the measure to the response routine.

13. The non-transitory computer-readable medium of claim 11 , wherein the OS security routine causes the processor to modify a portion of the OS security routine after the first measure is taken of the OS security routine so that a second measure subsequently taken of the OS security routine will differ from the first measure, and wherein the security server is configured to independently modify the copy of the OS security routine and to measure the modified copy of the OS security routine to derive a second expected measure, and wherein the response routine causes the processor to receive the second expected measure from the security server via the network interface and to compare the second measure to the second expected measure to again verify the integrity of the OS security routine.

14. The non-transitory computer-readable medium of claim 11 , wherein the method further comprises:

storing the OS and the OS security routine in a first portion of storage;

providing a second portion in the storage that acts as a secure enclave for storing the second operating environment and that is separate from the first portion; and

restricting accesses attempted by the OS to second operating environment within the secure enclave.

15. The non-transitory computer-readable medium of claim 14 , the secure enclave comprises security microcode.

Assignments (11)
CORRECTIVE ASSIGNMENT TO CORRECT THE THE PATENT TITLES AND REMOVE DUPLICATES IN THE SCHEDULE PREVIOUSLY RECORDED AT REEL: 059354 FRAME: 0335. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jun 23, 2022
From: MCAFEE, LLC
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 060792/0307 →
SECURITY INTEREST Recorded Mar 3, 2022
From: MCAFEE, LLC
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT AND COLLATERAL AGENT
Reel/Frame 059354/0335 →
RELEASE OF INTELLECTUAL PROPERTY COLLATERAL - REEL/FRAME 045056/0676 Recorded Mar 2, 2022
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MCAFEE, LLC
Reel/Frame 059354/0213 →
RELEASE OF INTELLECTUAL PROPERTY COLLATERAL - REEL/FRAME 045055/0786 Recorded Oct 26, 2020
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MCAFEE, LLC
Reel/Frame 054238/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENT 6336186 PREVIOUSLY RECORDED ON REEL 045056 FRAME 0676. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Oct 22, 2020
From: MCAFEE, LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 054206/0593 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENT 6336186 PREVIOUSLY RECORDED ON REEL 045055 FRAME 786. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Oct 22, 2020
From: MCAFEE, LLC
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 055854/0047 →
SECURITY INTEREST Recorded Jan 12, 2018
From: MCAFEE, LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 045056/0676 →
SECURITY INTEREST Recorded Jan 12, 2018
From: MCAFEE, LLC
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 045055/0786 →
CHANGE OF NAME AND ENTITY CONVERSION Recorded Aug 24, 2017
From: MCAFEE, INC.
To: MCAFEE, LLC
Reel/Frame 043665/0918 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 22, 2017
From: INTEL CORPORATION
To: MCAFEE, INC.
Reel/Frame 041344/0509 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 26, 2016
From: SUN, MINGQIU; POORNACHANDRAN, RAJESH; SMITH, NED M.; ZIMMER, VINCENT J.; SCHRECKER, SVEN; SELVARAJE, GOPINATTH
To: INTEL CORPORATION
Reel/Frame 039852/0782 →