Semiconductor device
View Patent ↗In order to provide a semiconductor device having high ESD tolerance, a semiconductor device (IC) is formed so that: a ground voltage wiring ( 22 a ) is electrically connected at one end in a wiring direction thereof to a wiring ( 22 b ) extending from a ground voltage pad used for external connection; an input voltage wiring ( 23 a ) is electrically connected at one end in a wiring direction thereof to a wiring ( 23 b ) extending from an input voltage pad used for external connection; and the one end of the ground voltage wiring ( 22 a ) and the one end of the input voltage wiring ( 23 a ) are substantially opposed to each other across a center of an NMOS transistor ( 10 ).
1. A semiconductor device, comprising:
a semiconductor substrate;
an NMOS transistor, comprising:
a plurality of sources and a plurality of drains alternately formed in a surface of the semiconductor substrate;
an even number of channels formed between the plurality of sources and the plurality of drains; and
a plurality of gates formed above the even number of channels;
a ground voltage wiring electrically connected to the plurality of sources through a plurality of source wirings;
an input voltage wiring electrically connected to the plurality of drains through a plurality of drain wirings;
a plurality of gate wirings for electrically connecting the ground voltage wiring to the plurality of gates, respectively;
a wiring extending from a ground voltage pad used for external connection, the wiring being electrically connected to one end of the ground voltage wiring; and
a wiring extending from an input voltage pad used for external connection, the wiring being electrically connected to another end of the input voltage wiring,
the one end of the ground voltage wiring and the another end of the input voltage wiring opposed to each other across a center of the NMOS transistor, and
the wiring formed at the one end extending from the ground voltage pad used for external connection, and the wiring formed at the another end extending from the input voltage pad used for external connection, each being formed in parallel to a channel length direction of the NMOS transistor.
2. A semiconductor device according to claim 1 ,
wherein the plurality of source wirings are formed of metal films having the same shape, and
wherein the plurality of drain wirings are formed of metal films having the same shape.
3. A semiconductor device according to claim 2 , wherein the plurality of gate wirings are formed of metal films having the same shape.