Control of P-contact resistance in a semiconductor light emitting device
View Patent ↗A device according to embodiments of the invention includes a semiconductor device structure ( 10 ) including a light emitting region ( 14 ) disposed between an n-type semiconductor region ( 16 ) and a p-type semiconductor region ( 12 ). A surface of the p-type semiconductor region ( 12 ) perpendicular to a growth direction of the semiconductor device structure ( 10 ) includes a first portion and a second portion. The first portion is less conductive than the second portion. The device further includes a p-contact ( 21 ) disposed on the p-type semiconductor region ( 12 ) and an n-contact ( 26 ) disposed on the n-type semiconductor region ( 16 ). The p-contact ( 21 ) includes a contact metal layer ( 20 ) and a blocking material layer ( 24 ). The blocking material layer ( 24 ) is disposed over the first portion and no blocking material layer ( 24 ) is disposed over the second portion.
1. A device comprising:
a semiconductor structure comprising a light emitting layer disposed between an n-type region and a p-type region, wherein a surface of the p-type region comprises a first portion and a second portion, wherein the surface is perpendicular to a growth direction of the semiconductor structure, wherein the first portion is less conductive than the second portion;
a p-contact formed on the p-type region, the p-contact comprising:
a reflector; and
a blocking material, wherein the blocking material is disposed over the first portion and no blocking material is disposed over the second portion; and
an n-contact formed on the n-type region;
a first metal bonding pad connected to the p-contact;
a second metal bonding pad connected to the n-contact; and
a gap disposed between the first and second metal bonding pads;
wherein the first portion is aligned with the gap.
2. The device of claim 1 wherein the p-contact further comprises a getter metal, wherein the getter metal getters hydrogen more readily than the reflector.
3. The device of claim 2 wherein the getter metal is disposed between the p-type region and the reflector.
4. The device of claim 2 wherein the getter metal is disposed within the reflector.
5. The device of claim 2 wherein the reflector is disposed between the p-type region and the getter metal.
6. The device of claim 2 wherein the getter metal comprises one of Co, Ni, Fe, Cu, an alloy of Co, an alloy of Ni, an alloy of Fe, and an alloy of Cu.
7. The device of claim 1 wherein the blocking material is a metal.
8. The device of claim 1 wherein the blocking material comprises one of Co, Ni, Fe, Cu, Ti, W, Pt, Au, Ir, Ru, a conductive oxide, indium tin oxide, zinc oxide, indium zinc oxide, fluorine doped tin oxide, aluminium doped zinc oxide, and an alloy of one of Co, Ni, Fe, Cu, Ti, W, Pt, Au, Ir, and Ru.
9. The device of claim 1 wherein:
the semiconductor structure comprises a mesa wherein a portion of the light emitting layer and p-type region are removed or not formed; and
the first portion is adjacent the mesa.
10. A semiconductor light emitting device comprising:
a semiconductor structure comprising a light emitting layer disposed between an n-type region and a p-type region, wherein a surface of the p-type region comprises a first portion and a second portion, wherein the surface is perpendicular to a growth direction of the semiconductor structure, wherein the first portion is less conductive than the second portion; and
a p-contact formed on the p-type region, the p-contact comprising:
a reflector; and
a blocking material, wherein the blocking material is disposed over the first portion and no blocking material is disposed over the second portion; wherein:
the blocking material is aligned with a first region of the light emitting layer and no blocking material is aligned with a second region of the light emitting layer;
the first region is aligned with a gap disposed between a first metal pad electrically connected to the n-type region and a second metal pad electrically connected to the p-type region; and
the first region emits less light than the second region.
11. The semiconductor light emitting device of claim 10 wherein a portion of the light emitting layer and p-type region are removed or not formed to form a mesa and the first portion is disposed between the mesa and the second region.