Modular, expandable system for data reception and distribution
View Patent ↗A satellite reception assembly may comprise a first module operable to demodulate a first one or more channels of a signal output by a direct broadcast satellite (DBS) low noise block downconverter (LNB). The first module may output a signal to a second module which may demodulate a second one or more channels of the signal output by the DBS LNB. The second module may be installed after the satellite reception assembly has been deployed upon a number of clients served by the satellite reception assembly reaching a threshold.
1. A system comprising:
first circuitry comprising analog-to-digital conversion circuitry, channelization and client interface circuitry, and expansion interface circuitry, wherein:
said analog-to-digital conversion circuitry is configured to digitize each of a plurality of downconverted satellite signals to generate a plurality of digitized satellite signals, each of said plurality of downconverted satellite signals comprising a plurality of channels;
said channelization and client interface circuitry is configured to select one or more of said channels for output via a first interface of said first circuitry;
said expansion interface circuitry is configured to output one or more of said digitized satellite signals via a second interface of said first circuitry.
2. The system of claim 1 , comprising second circuitry configured to receive said one or more of said digitized satellite signals from said second interface of said first circuitry via a second interface of said second circuitry.
3. The system of claim 2 , wherein said second circuitry comprises channelization and client interface circuitry configured to select one or more of said channels for output via a first interface of said second circuitry.
4. The system of claim 3 , wherein said second circuitry comprises expansion interface circuitry configured to output one or more of said digitized satellite signals via a third interface of said second circuitry.
5. The system of claim 2 , wherein said first circuitry resides on a first semiconductor die and said second circuitry resides on a second semiconductor die.
6. The system of claim 2 , wherein said second circuitry resides in a socket on a printed circuit board such that said second circuitry is field replaceable.
7. The system of claim 2 , wherein said first circuitry and said second circuitry reside in a shared housing along with a low noise block downconverter that outputs said downconverted satellite signals.
8. The method of claim 2 , wherein said first circuitry and said second circuitry reside in a shared housing along with a low noise block downconverter that outputs said downconverted satellite signals.
9. The system of claim 1 , wherein each of said downconverted satellite signals corresponds to a respective one of a plurality of polarizations of a respective one of a plurality of satellites.
10. The system of claim 1 , comprising aggregation circuitry configured to receive said one or more of said channels output via said first interface of said first circuitry and said one or more of said channels output via said first interface of said second circuitry.
11. The system of claim 10 , wherein said aggregation circuitry is configured to perform time division multiplexing and/or frequency division multiplexing of said one or more of said channels output via said first interface of said first circuitry and said one or more of said channels output via said first interface of said second circuitry onto a link to a client device.
12. The method of claim 10 , comprising time division multiplexing and/or frequency division multiplexing, by said aggregation circuitry, said one or more of said channels output via said first interface of said first circuitry and said one or more of said channels output via said first interface of said second circuitry onto a link to a client device.
13. The method of claim 1 , wherein each of said downconverted satellite signals corresponds to a respective one of a plurality of polarizations of a respective one of a plurality of satellites.
14. The method of claim 1 , comprising receiving, in aggregation circuitry, said one or more channels output via said first interface of said first circuitry and said one or more of said channels output via said first interface of said second circuitry.
15. A method comprising:
in first circuitry:
digitizing, via analog-to-digital conversion circuitry, each of a plurality of downconverted satellite signals to generate a plurality of digitized satellite signals, each of said plurality of downconverted satellite signals comprising a plurality of channels;
selecting, by channelization and client interface circuitry, one or more of said channels for output via a first interface of said first circuitry;
outputting, via expansion interface circuitry, one or more of said digitized satellite signals via a second interface of said first circuitry.
16. The method of claim 15 , comprising receiving, in second circuitry, said one or more of said digitized satellite signals from said second interface of said first circuitry via a second interface of said second circuitry.
17. The method of claim 16 , wherein said first circuitry resides on a first semiconductor die and said second circuitry resides on a second semiconductor die.
18. The method of claim 16 , wherein said second circuitry resides in a socket on a printed circuit board such that said second circuitry is field replaceable.
19. The method of claim 15 , comprising selecting, by channelization and client interface circuitry of said second circuitry, one or more of said channels for output via a first interface of said second circuitry.
20. The method of claim 19 , comprising outputting, by expansion interface circuitry of said second circuitry, one or more of said digitized satellite signals via a third interface of said second circuitry.