IP Library Granted Patent US 10,008,165
Granted Patent B2
US 10,008,165 · App. 14/794,845 · Granted Jun 26, 2018

TFT display device including unit circuits, pixel circuits and a display element

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Quick Facts
Patent No.
US 10,008,165
App. No.
14/794,845
Granted
Jun 26, 2018
Kind
B2
Abstract

Disclosed is a display device for use of a surface display of an arbitrary shape, including a plural number of display element units, each made up of a circuit that forms a single stage of a scanning circuit and a pixel circuit connected to an output of the scanning circuit, are arranged in a unicursal fashion on a display substrate.

Claims (14)

1. A TFT display device comprising:

a plurality of stages of unit circuits arranged in a cascade connection to form a scanning circuit,

each of the unit circuits including an input node to receive a scanning signal a clock output node to receive a clock signal and an output node to output the scanning signal,

each of the unit circuits, responsive to the clock signal received at the clock input node, outputting, from the output node thereof, the scanning signal received at a scanning signal input terminal or received at the input node thereof from a preceding unit circuit to transfer the scanning signal to a succeeding unit circuit from the output node thereof and supplying the scanning signal from the output node thereof to a pixel circuit arranged in a stage corresponding to each of the unit circuits; and

a plurality of the pixel circuits, each of the pixel circuits including:

a display element having a first end connected to a common electrode; and

a switch transistor adapted to be turned on and off by the scanning signal supplied thereto from the output node of a corresponding stage of the unit circuit, the switch transistor arranged between a terminal to which a data signal is supplied and a second end of the display element,

a wiring that is connected in common to terminals to which a plurality of the data signals are applied, wherein a voltage signal corresponding to a grayscale level to be displayed by the display element is sequentially applied to the wiring with a cycle of the clock signal,

wherein a plurality of the display elements are arranged in two-dimensional directions to form a display area, with the scanning circuit disposed inside the display area, as viewed in a planer view,

wherein each of the unit circuits includes a switch that is controlled by the clock signal received to be turned on and off, to pass the scanning signal received at the input node to the output node when turned on,

wherein the scanning circuit and the pixel circuits are formed on a non-rectangular substrate with one or more edges being curved, as viewed in a planer view,

wherein the display area, inside of which the scanning circuit is formed, is formed along the edge of the substrate, and

wherein with respect to a row of an array of the display elements, a part of the scanning circuit is disposed between two adjacent rows of the display elements.

2. An electronic device including the TFT display device as set forth in claim 1 .

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 30, 2019
From: TIANMA JAPAN, LTD. (FORMERLY NLT TECHNOLOGIES, LTD.)
To: TIANMA MICROELECTRONICS CO., LTD.
Reel/Frame 050582/0869 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 9, 2015
From: HAGA, HIROSHI; ASADA, HIDEKI; KANEKO, SETSUO
To: NEC LCD TECHNOLOGIES, LTD
Reel/Frame 036038/0779 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 9, 2015
From: NEC LCD TECHNOLOGIES, LTD
To: NLT TECHNOLOGIES, LTD.
Reel/Frame 036083/0327 →