IP Library Granted Patent US 9,766,410
Granted Patent B1
US 9,766,410 · App. 14/795,961 · Granted Sep 19, 2017

Wafer-level testing of photonic integrated circuits with optical IOs

Inventor: Long Chen (Marlboro, NJ)
Assignee: Acacia Communications, Inc.
G02B6/3596G02B6/12002G02B6/12004G02B6/124G02B6/2852G02B6/30G02B6/34G02B6/42G02B2006/12159
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Quick Facts
Patent No.
US 9,766,410
App. No.
14/795,961
Granted
Sep 19, 2017
Kind
B1
Abstract

Techniques for forming a photonic integrated circuit having a facet coupler and a surface coupler are described. The photonic integrated circuit may be on a wafer, which may be diced to form an integrated device. The facet coupler may be positioned proximate to an edge of the integrated device, and the surface coupler may be positioned on a surface of the integrated device. The surface coupler may allow for evaluation and assessment of the circuit's performance, which may facilitate wafer-level testing of the circuit and diagnosis of the circuit before and after packaging.

Claims (18)

1. An integrated device comprising:

a photonic integrated circuit including a M×N coupler within a plane of the integrated device;

at least one facet coupler positioned on an edge of the integrated device and configured to couple light between the photonic integrated circuit and a first external optical component positioned proximate to the edge within the plane; and

at least one surface coupler positioned on a surface of the integrated device and configured to couple light between the photonic integrated circuit and a second external optical component positioned proximate to the surface in a direction substantially perpendicular to the plane, wherein the at least one surface coupler includes a first surface coupler coupled to an input or an output of the M×N coupler.

2. The integrated device of claim 1 , wherein the at least one surface coupler includes a second surface coupler, and the photonic integrated circuit includes a circuit component to which the at least one facet coupler and the second surface coupler are coupled.

3. The integrated device of claim 1 , wherein the at least one surface coupler includes two second surface couplers, and the photonic integrated circuit includes a circuit component having a subcomponent coupled to the two second surface couplers.

4. The integrated device of claim 1 , wherein the at least one facet coupler includes a first facet coupler coupled to an input or an output of the M×N coupler, and wherein the first facet coupler and the first surface coupler are both coupled to either an input side or an output side of the M×N coupler.

5. The integrated device of claim 1 , wherein the M×N coupler includes an optical switch, and the first surface coupler is coupled to an input or an output of the optical switch.

6. The integrated device of claim 5 , wherein the at least one facet coupler includes a first facet coupler coupled to an input or an output of the optical switch, wherein the first facet coupler and the first surface coupler are both coupled to either an input side or an output side of the optical switch.

7. The integrated device of claim 6 , wherein the optical switch is configured by a control signal to have a first state where the first facet coupler is configured to couple light between the photonic integrated circuit and the first external optical component and a second state where the first surface coupler is configured to couple light between the photonic integrated circuit and the second external optical component.

8. The integrated device of claim 1 , wherein the M×N coupler includes a tap coupler, and the first surface coupler is coupled to an input or an output of the tap coupler.

9. The integrated device of claim 8 , wherein the at least one facet coupler includes a first facet coupler coupled to an input or an output of a waveguide coupled to the tap coupler.

10. The integrated device of claim 1 , wherein the M×N coupler includes a star coupler and the first surface coupler is coupled to an input or an output of the star coupler.

11. The integrated device of claim 10 , wherein the at least one facet coupler includes a first facet coupler coupled to an input or an output of the star coupler, wherein the first facet coupler and the first surface coupler are both coupled to either an input side or an output side of the star coupler.

12. The integrated device of claim 10 , wherein the photonic integrated circuit includes an arrayed-waveguide grating having the star coupler.

13. The integrated device of claim 1 , wherein the M×N coupler has a splitter structure.

14. The integrated device of claim 1 , wherein the M×N coupler has a combiner structure.

15. The integrated device of claim 1 , wherein the photonic integrated circuit includes at least one Mach-Zehnder interferometer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 19, 2024
From: ACACIA COMMUNICATIONS, INC.
To: ACACIA TECHNOLOGY, INC.
Reel/Frame 066832/0659 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 30, 2015
From: CHEN, LONG
To: ACACIA COMMUNICATIONS, INC.
Reel/Frame 036924/0724 →
Continuity (1)
Provisional Application 62023493 · Jul 11, 2014