Semiconductor device having improved heat dissipation
View Patent ↗A semiconductor device having improved heat dissipation is disclosed. The semiconductor device includes a semi-insulating substrate and epitaxial layers disposed on the semi-insulating substrate wherein the epitaxial layers include a plurality of heat conductive vias that are disposed through the epitaxial layers with the plurality of heat conductive vias being spaced along a plurality of finger axes that are aligned generally parallel across a surface of the epitaxial layers. The semiconductor device further includes an electrode having a plurality of electrically conductive fingers that are disposed along the plurality of finger axes such that the electrically conductive fingers are in contact with the first plurality of heat conductive vias.
1. A method of fabricating a semiconductor device having improved heat dissipation comprising:
providing a semi-insulating substrate;
disposing epitaxial layers on the semi-insulating substrate;
disposing a plurality of heat conductive vias through the epitaxial layers with the plurality of heat conductive vias being arranged in rows that are aligned parallel to a plurality of finger axes that are aligned generally parallel across a surface of the epitaxial layers; and
disposing an electrode with a plurality of electrically conductive fingers along the plurality of finger axes such that individual ones of the plurality of electrically conductive fingers extend over corresponding rows of the plurality of heat conductive vias and are in contact with the plurality of heat conductive vias.
2. The method of claim 1 further including disposing a second plurality of heat conductive vias through the epitaxial layers with the second plurality of heat conductive vias being arranged in rows that are aligned parallel to a second plurality of finger axes that are interdigitated with the plurality of finger axes, and disposing a second electrode with a second plurality of electrically conductive fingers along the second plurality of finger axes such that individual rows of the second plurality of electrically conductive fingers extend over corresponding rows of the second plurality of heat conductive vias and are in contact with the second plurality of heat conductive vias.
3. The method of claim 1 further including extending the plurality of heat conductive vias into the semi-insulating substrate.
4. The method of claim 1 further including filling the plurality of heat conductive vias with an electrically conductive material.
5. The method of claim 4 further disposing a through-hole via into the semi-insulating substrate to electrically couple and thermally couple the plurality of heat conductive vias to a back metal.
6. The method of claim 1 wherein the semi-insulating substrate is made of silicon carbide (SiC) polytypes.
7. The method of claim 6 wherein the SiC polytypes have a bulk thermal conductivity that ranges from around about 3.6 W/cm·K to around about 4.9 W/cm·K.
8. The method of claim 1 wherein a bulk electrical resistivity of the semi-insulating substrate ranges from around about 10 7 ohm-cm to around about 10 12 ohm-cm.
9. The method of claim 8 further including selecting material for making up the semi-insulating substrate from at least one member of the group consisting of SiC, silicon (Si), GaN, zinc oxide (ZnO), aluminum oxide (Al 2 O 3 ), and gallium oxide (Ga 2 O 3 ).
10. The method of claim 1 wherein the semiconductor device is a GaN HEMT.