IP Library Granted Patent US 9,824,043
Granted Patent B2
US 9,824,043 · App. 14/799,052 · Granted Nov 21, 2017

System with solid state drive and control method thereof

Inventors: Jen-Yu Hsu (Taipei, TW); Yi-Chiang Wang (Taipei, TW); Chia-Hua Liu (Taipei, TW); Chao-Ton Yang (Taipei, TW); Tsung-Ching Chang (Taipei, TW)
Assignee: LITE-ON TECHNOLOGY CORPORATION
G06F13/28G06F12/10G06F13/102G06F3/0661
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,824,043
App. No.
14/799,052
Granted
Nov 21, 2017
Kind
B2
Abstract

A system includes a host device, an external bus and a storage device. A driver is installed in the host device. The external bus is connected with the host device. The external bus supports a communication protocol. The storage device includes a controlling circuit and a non-volatile memory. After the storage device issues a request to the host device according to the communication protocol, a reserved space is created in a host memory of the host device in response to the request, and a device information from the storage device is stored into the reserved space. While the host device issues a first command to operate the storage device, the first command is converted into a second command by the driver according to the device information, and then the second command is transmitted to the storage device.

Claims (27)

1. A system, comprising:

a host device comprising a host memory, wherein a driver is installed in the host device;

an external bus connected with the host device, wherein the external bus supports a communication protocol; and

a storage device comprising a controlling circuit and a non-volatile memory, wherein the controlling circuit is connected with the external bus, and the non-volatile memory is connected with the controlling circuit through an internal bus,

wherein after the storage device issues a request to the host device according to the communication protocol, a reserved space is created in the host memory in response to the request, and a device information from the storage device is stored into the reserved space, wherein while the host device issues a first command to operate the storage device, the first command is converted into a second command by the driver according to the device information, and then the second command is transmitted to the storage device.

2. The system as claimed in claim 1 , wherein the driver accesses the device information in the reserved space according to the first command and acquires an execution information, and then, the driver converts the first command into the second command by adding the execution information to the first command.

3. The system as claimed in claim 1 , wherein the second command contains the first command and an execution information, wherein the driver accesses the device information in the reserved space according to the first command and acquires the execution information.

4. The system as claimed in claim 1 , wherein the external bus is a SATA bus or a PCIe bus, and the communication protocol is an advanced host controller interface (AHCI) protocol or a non-volatile memory express (NVMe) protocol.

5. The system as claimed in claim 1 , wherein the device information includes a flash translation layer table, a garbage collection update table or a storage block state.

6. The system as claimed in claim 1 , wherein the first command contains plural double words, and at least one of the plural double words is a reserved double word, wherein the first command is converted into the second command by adding an execution information to the reserved double word of the first command by the driver.

7. The system as claimed in claim 6 , wherein the first command contains a logical block address, and the execution information contains a physical allocation address, wherein the physical allocation address is acquired by mapping the logical block address according to a flash translation layer table, wherein the flash translation layer table is stored in the reserved space of the host memory.

8. A control method for a host device of a system, a storage device of the system being in communication with the host device through an external bus, the control method comprising steps of:

receiving a request from the storage device according to a communication protocol supported by the external bus, and creating a reserved space in a host memory of the host device in response to the request; and

receiving a device information from the storage device, and storing the device information into the reserved space,

wherein while the host device issues a first command to operate the storage device, the first command is converted into a second command by a driver according to the device information, and then the second command is transmitted to the storage device.

9. The control method as claimed in claim 8 , wherein the device information in the reserved space is accessed by the driver to acquire an execution information, wherein the execution information is added to the first command by the driver to generate the second command.

10. The control method as claimed in claim 8 , wherein the second command contains the first command and an execution information, wherein the device information in the reserved space is accessed by the driver to acquire the execution information.

11. The control method as claimed in claim 8 , wherein the external bus is a SATA bus or a PCIe bus, and the communication protocol is an advanced host controller interface (AHCI) protocol or a non-volatile memory express (NVMe) protocol.

12. The control method as claimed in claim 8 , wherein the device information includes a flash translation layer table, a garbage collection update table or a storage block state.

13. A control method for a storage device of a system, a host device of the system being in communication with the storage device through an external bus, the control method comprising steps of:

issuing a request to the host device according to a communication protocol supported by the external bus, so that a reserved space is created in a host memory of the host device; and

storing a device information into the reserved space of the host memory,

wherein after a first command is converted into a second command by a driver of the host device according to the device information, the storage device receives the second command.

14. The control method as claimed in claim 13 , wherein the storage device acquires an execution information from the second command, and the storage device executes the second command according to the execution information.

15. The control method as claimed in claim 13 , wherein the second command contains the first command and an execution information, wherein the device information in the reserved space is accessed by the driver to acquire the execution information.

16. The control method as claimed in claim 13 , wherein the external bus is a SATA bus or a PCIe bus, and the communication protocol is an advanced host controller interface (AHCI) protocol or a non-volatile memory express (NVMe) protocol.

17. The control method as claimed in claim 13 , wherein the device information includes a flash translation layer table, a garbage collection update table or a storage block state.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2019
From: LITE-ON TECHNOLOGY CORPORATION
To: SOLID STATE STORAGE TECHNOLOGY CORPORATION
Reel/Frame 051213/0875 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2015
From: HSU, JEN-YU; WANG, YI-CHIANG; LIU, CHIA-HUA; YANG, CHAO-TON; CHANG, TSUNG-CHING
To: LITE-ON TECHNOLOGY CORPORATION
Reel/Frame 036161/0029 →
Priority Claims (1)
CN 2015 1 0259004 · May 20, 2015 · national
Continuity (2)
Provisional Application 62106280 · Jan 22, 2015
Related Publication 20160217089A1 · Jul 28, 2016