Memory controller configured to transmit interrupt signal if volatile memory has no data corresponding to address requested from source
According to one embodiment, a memory device includes a nonvolatile memory, a volatile memory, a controller, and a board. The nonvolatile memory stores data. The volatile memory holds a part of the data stored in the nonvolatile memory. The memory controller controls the volatile memory and the nonvolatile memory. The nonvolatile memory, the volatile memory, and the memory controller are provided on the board. The memory controller transmits an interrupt signal to a request source, when the volatile memory does not have any data corresponding to an address which the request source requests to access.
1. A memory device comprising:
a nonvolatile memory configured to store data;
a volatile memory configured to store a part of the data stored in the nonvolatile memory;
a memory controller configured to control the volatile memory and the nonvolatile memory; and
a board configured to provide the nonvolatile memory, the volatile memory, and the memory controller, thereon, wherein
the memory controller transmits an interrupt signal to a request source in case of the volatile memory having no data corresponding to an address requested by the request source.
2. The device according to claim 1 , further comprising a direct-memory-access controller provided in the memory controller.
3. The device according to claim 2 , wherein, after the memory controller has transmitted the interrupt signal to the request source, the memory controller causes the direct-memory-access controller to read data corresponding to the address from the nonvolatile memory, to transmit the read data to the volatile memory, and to transmit an interrupt completion signal to the request source.
4. The device according to claim 2 , further comprising terminals provided on the board configured to output the interrupt signal and the interrupt completion signal.
5. The device according to claim 3 , wherein the address includes a first bit area and a second bit area, the first bit area holds first information indicative of an address of the volatile memory, and the second bit area holds upper bits of the address requested by the request source.
6. The device according to claim 5 , wherein the memory controller has a table storing the second information on the second bit area corresponding to the first information on the first bit area, and the table includes third information corresponding to the second information of the second bit area, the third information indicates whether data held in the volatile memory corresponding to the first information of the first bit area is written to an area specified by the second information on the second bit area of the nonvolatile memory.
7. A memory module comprising:
a nonvolatile memory configured to store data;
a volatile memory configured to store a part of the data stored in the nonvolatile memory; and
a memory controller configured to control the volatile memory and the nonvolatile memory and to transmit an interrupt signal to a request source in case of the volatile memory having no data corresponding to an address requested by the request source.
8. The module according to claim 7 , further comprising a direct-memory-access controller provided in the memory controller.
9. The module according to claim 8 , wherein, after the memory controller has transmitted the interrupt signal to the request source, the memory controller causes the direct-memory-access controller to read data corresponding to the address from the nonvolatile memory, to transmit the read data to the volatile memory, and to transmit a completion signal to the request source.
10. The module according to claim 8 , further comprising at least one terminal configured to output the interrupt signal and the interrupt completion signal.
11. The module according to claim 9 , wherein the address includes a first bit area and a second bit area, the first bit area holds first information indicative of an address of the volatile memory, and the second bit area holds upper bits of the address requested by the request source.
12. The module according to claim 11 , wherein the memory controller has a table storing the second information on the second bit area corresponding to the first information on the first bit area, and the table includes third information corresponding to the second information of the second bit area, the third information indicates whether data held in the volatile memory corresponding to the first information of the first bit area is written to an area specified by the second information on the second bit area of the nonvolatile memory.
13. A data access method comprising:
receiving a request for accessing data in a memory module, from a request source, the memory module including a nonvolatile memory to store data, and a volatile memory to hold a part of the data stored in the nonvolatile memory; and
transferring an interrupt signal to the request source, when there is no requested data in the volatile memory.
14. The method according to claim 13 , further comprising transferring a completion signal to the request source after transferring the requested data from the nonvolatile memory to the volatile memory.
15. The method according to claim 14 , further comprising transferring the requested data to the request source after having transferred the completion signal.