IP Library Granted Patent US 10,566,488
Granted Patent B2
US 10,566,488 · App. 14/811,475 · Granted Feb 18, 2020

Solar cell and method for manufacturing the same

Inventors: Seunghwan Shim (Seoul, KR); Ilhyoung Jung (Seoul, KR); Indo Chung (Seoul, KR); Eunhye Youn (Seoul, KR)
Assignee: LG ELECTRONICS INC.
H01L31/077H01L31/028H01L31/022425H01L31/022441H01L31/03682H01L31/035272H01L31/0747H01L31/182H01L31/1804H01L31/186Y02E10/547Y02P70/521
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Quick Facts
Patent No.
US 10,566,488
App. No.
14/811,475
Granted
Feb 18, 2020
Kind
B2
Abstract

A solar cell and a method for manufacturing the same are disclosed. The solar cell includes a semiconductor substrate doped with impurities of a first conductive type, a front surface field region disposed at a front surface of the substrate and doped with impurities of the first conductive type at a concentration higher than those of the substrate, a tunnel layer disposed on a back surface of the substrate and formed of a dielectric material, an emitter region disposed at a first portion of a back surface of the tunnel layer and doped with impurities of a second conductive type opposite the first conductive type, and a back surface field region disposed at a second portion of the back surface of the tunnel layer and doped with impurities of the first conductive type at a concentration higher than those of the substrate.

Claims (20)

1. A method for manufacturing a solar cell, the method comprising:

depositing a tunnel layer formed of a dielectric material on an entire back surface of a semiconductor substrate containing impurities of a first conductive type;

depositing an intrinsic semiconductor layer on an entire back surface of the tunnel layer;

implanting impurities of a second conductive type opposite the first conductive type into a first area of the intrinsic semiconductor layer, the first area of the intrinsic semiconductor area being a part of the intrinsic semiconductor layer;

forming a SiC layer on an entire back surface of the intrinsic semiconductor layer;

texturing a front surface of the semiconductor substrate using the SiC layer as a mask;

removing a portion of the SiC layer by a laser, such that the SiC layer covers the first area and the portion of the intrinsic semiconductor layer except for a second area, wherein the portion of the intrinsic layer is disposed between the first area and the second area;

performing a thermal diffusion operation for thermally diffusing a doping source containing impurities of the first conductive type in the second area of the intrinsic semiconductor layer and in the front surface of the semiconductor substrate at the same time using the SiC layer as a mask, wherein the SiC layer is converted into a SiOx layer during the thermal diffusion operation; and

removing the SiOx layer,

wherein a front surface field region at the front surface of the semiconductor substrate and a back surface field region at the second area of the intrinsic semiconductor layer and an emitter region at the first area of the intrinsic semiconductor layer are simultaneously formed by the thermal diffusion operation.

2. The method of claim 1 , wherein the first area of the intrinsic semiconductor layer and the second area of the intrinsic semiconductor layer are separated from each other.

3. The method of claim 1 , wherein the emitter region is formed of polycrystalline silicon material in the diffusion operation.

4. The method of claim 1 , wherein a by-product being one of phosphosilicate glass (PSG) or borosilicate glass (BSG) generated in the front surface field region and the back surface field region in the thermal diffusion operation is removed from the front surface field region and the back surface field region in the removing of the SiOx layer.

5. The method of claim 4 , wherein in the removing of the SiOx layer, the front surface field region, the back surface field region and the emitter region are simultaneously etched, and an etching rate of the front surface field region is greater than an etching rate of the back surface field region.

6. The method of claim 1 , wherein a ratio of sheet resistances of the front surface field region and the back surface field region after the removing of the SiOx layer is 10:1 to 3:1.

7. The method of claim 1 , wherein a thickness of the back surface field region is less than the thickness of the emitter region.

8. The method of claim 1 , wherein a thickness of the portion of the intrinsic semiconductor layer is greater than a thickness of the back surface field region and less than a thickness of the emitter region.

9. The method of claim 1 , wherein, in the implanting of impurities of the second conductive type opposite the first conductive type into the first area of the intrinsic semiconductor layer, the impurities of the second conductive type is implanted into a certain depth of the intrinsic semiconductor layer so that a portion of the first area of the intrinsic semiconductor layer is without the impurities of the second conductive type.

10. The method of claim 1 , wherein an etchant used in the removing of the SiOx layer includes potassium hydroxide (KOH) and hydrogen peroxide (H 2 O 2 ), and

a thickness of the emitter region and a thickness of the back surface field region are formed differently from each other during the removing of the SiOx layer.

Assignments (3)
CHANGE OF NAME Recorded Dec 11, 2023
From: SHANGRAO JINKO SOLAR TECHNOLOGY DEVELOPMENT CO., LTD
To: SHANGRAO XINYUAN YUEDONG TECHNOLOGY DEVELOPMENT CO. LTD
Reel/Frame 066044/0299 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 28, 2022
From: LG ELECTRONICS INC.
To: SHANGRAO JINKO SOLAR TECHNOLOGY DEVELOPMENT CO., LTD
Reel/Frame 061571/0754 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 6, 2015
From: SHIM, SEUNGHWAN; JUNG, ILHYOUNG; CHUNG, INDO; YOUN, EUNHYE
To: LG ELECTRONICS INC.
Reel/Frame 036981/0711 →
Priority Claims (1)
KR 10-2014-0095993 · Jul 28, 2014 · national
Continuity (1)
Related Publication 20160027951A1 · Jan 28, 2016