IP Library Granted Patent US 9,813,226
Granted Patent B2
US 9,813,226 · App. 14/819,337 · Granted Nov 7, 2017

Modeling a clock

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Quick Facts
Patent No.
US 9,813,226
App. No.
14/819,337
Granted
Nov 7, 2017
Kind
B2
Abstract

Methods, systems, and computer readable media for modeling a clock are disclosed. According to one exemplary method, the method occurs at a monitoring module associated with a first node. The method includes receiving packets from a second node, extracting timestamps from at least two of the packets, and generating, using the timestamps, clock related information for generating a local clock model indicative of a precision of a local clock at the first node relative to a clock at the second node.

Claims (73)

1. A method for modeling a clock, the method comprising:

at a monitoring module associated with a first node:

receiving packets from a second node;

extracting timestamps from at least two of the packets; and

generating, using the timestamps, clock related information for generating a local clock model indicative of a precision of a local clock at the first node relative to a clock at the second node, wherein the clock related information includes a clock period scale factor value for indicating a number of clock periods associated with a first clock that occur during a clock period associated with a second clock and a relative phase offset value for correlating the first clock and the second clock.

2. The method of claim 1 wherein the local clock model is adjusted aperiodically or periodically.

3. A method for modeling a clock, the method comprising:

at a monitoring module associated with a first node:

receiving packets from a second node;

extracting timestamps from at least two of the packets; and

generating, using the timestamps, clock related information for generating a local clock model indicative of a precision of a local clock at the first node relative to a clock at the second node; and

at the monitoring module or the first node:

generating the local clock model using the clock related information;

receiving a first packet containing a transmit timestamp associated with the second node;

generating a receipt timestamp indicating when the first packet is received at the first node;

generating, using the local clock model and the transmit timestamp, a time representation associated with the transmit timestamp that is more precise than the transmit timestamp; and

performing a traffic related measurement using the time representation or the local clock model.

4. The method of claim 3 wherein performing the traffic related measurement includes computing one-way latency, jitter, or another traffic related measurement.

5. The method of claim 4 wherein computing one-way latency includes computing the difference between the receipt timestamp and the time representation.

6. The method of claim 3 comprising:

performing a monitoring enhancement action in response to meeting or exceeding one or more threshold values associated with the traffic related measurement or a confidence value associated with the clock model.

7. The method of claim 6 wherein performing the monitoring enhancement action includes initiating modification of the first packet, initiating modification of the transmit timestamp in the packet with timestamp information associated with the first node or the local clock model, initiating copying of the first packet, initiating a timestamped copying of at least a portion of the first packet, initiating utilization of one or more test packets for testing the second node, the first node, or a communications path or initiating monitoring of subsequent packets sent from the second node to the first node using packet identifiers.

8. A method for modeling a clock, the method comprising:

at a monitoring module associated with a first node:

receiving packets from a second node;

extracting timestamps from at least two of the packets; and

generating, using the timestamps, clock related information for generating a local clock model indicative of a precision of a local clock at the first node relative to a clock at the second node, wherein the second node or the first node includes a device under test, a test platform, a test device, a source node, a destination node, a probe, a monitoring device, a logic device, a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), or an application specific integrated circuit (ASIC).

9. A system for modeling a clock, the system comprising:

at least one memory;

a monitoring module (MM) associated with a first node, wherein the MM is implemented using the at least one memory, wherein the MM is configured to:

receive packets from the second node;

extract timestamps from at least two of the packets; and

generate, using the timestamps, clock related information for generating a local clock model indicative of a precision of a local clock at the first node relative to a clock at the second node, wherein the clock related information includes a clock period scale factor value for indicating a number of clock periods associated with a first clock that occur during a clock period associated with a second clock and a relative phase offset value for correlating the first clock and the second clock.

10. The system of claim 9 wherein the local clock model is adjusted aperiodically or periodically.

11. A system for modeling a clock, the system comprising:

at least one memory;

a monitoring module (MM) associated with a first node, wherein the MM is implemented using the at least one memory, wherein the MM is configured to:

receive packets from the second node;

extract timestamps from at least two of the packets; and

generate, using the timestamps, clock related information for generating a local clock model indicative of a precision of a local clock at the first node relative to a clock at the second node,

wherein the system is configured to:

generate the local clock model using the clock related information;

receive a first packet containing a transmit timestamp associated with the second node;

generate a receipt timestamp indicating when the first packet is received at the first node;

generate, using the local clock model and the transmit timestamp, a time representation associated with the transmit timestamp that is more precise than the transmit timestamp; and

perform a traffic related measurement using the time representation or the local clock model.

12. The system of claim 11 wherein the first node is configured to perform the traffic related measurement by computing one-way latency, jitter, or another traffic related measurement.

13. The system of claim 12 wherein the first node is configured to compute one-way latency by computing the difference between the receipt timestamp and the time representation.

14. The system of claim 11 wherein the first node is configured to:

perform a monitoring enhancement action in response to meeting or exceeding one or more threshold values associated with the traffic related measurement or a confidence value associated with the local clock model.

15. The system of claim 14 wherein the first node is configured to perform the monitoring enhancement action by initiating modification of the first packet, initiating modification of the transmit timestamp in the packet with timestamp information associated with the first node or the local clock model, initiating copying of the first packet, initiating a timestamped copying of at least a portion of the first packet, initiating utilization of one or more test packets for testing the second node, the first node, or a communications path or initiating monitoring of subsequent packets sent from the second node to the first node using packet identifiers.

16. A system for modeling a clock, the system comprising:

at least one memory;

a monitoring module (MM) associated with a first node, wherein the MM is implemented using the at least one memory, wherein the MM is configured to:

receive packets from the second node;

extract timestamps from at least two of the packets; and

generate, using the timestamps, clock related information for generating a local clock model indicative of a precision of a local clock at the first node relative to a clock at the second node, wherein the second node or the first node includes a device under test, a test platform, a test device, a source node, a destination node, a probe, a monitoring device, a logic device, a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), or an application specific integrated circuit (ASIC).

17. A non-transitory computer readable medium comprising executable instructions thereon that when executed by a processor of a computer perform steps comprising:

at a monitoring module associated with a first node:

receiving packets from a second node;

extracting timestamps from at least two of the packets; and

generating, using the timestamps, clock related information for generating a local clock model indicative of a precision of a local clock at the first node relative to a clock at the second node, wherein the clock related information includes a clock period scale factor value for indicating a number of clock periods associated with a first clock that occur during a clock period associated with a second clock and a relative phase offset value for correlating the first clock and the second clock.

18. A non-transitory computer readable medium comprising executable instructions thereon that when executed by a processor of a computer perform steps comprising:

at a monitoring module associated with a first node:

receiving packets from a second node;

extracting timestamps from at least two of the packets; and

generating, using the timestamps, clock related information for generating a local clock model indicative of a precision of a local clock at the first node relative to a clock at the second node; and

at the monitoring module or the first node:

generating the local clock model using the clock related information;

receiving a first packet containing a transmit timestamp associated with the second node;

generating a receipt timestamp indicating when the first packet is received at the first node;

generating, using the local clock model and the transmit timestamp, a time representation associated with the transmit timestamp that is more precise than the transmit timestamp; and

performing a traffic related measurement using the time representation or the local clock model.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2018
From: KEYSIGHT TECHNOLOGIES SINGAPORE (HOLDINGS) PTE. LTD.
To: KEYSIGHT TECHNOLOGIES SINGAPORE (SALES) PTE. LTD.
Reel/Frame 048225/0065 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 18, 2017
From: IXIA
To: KEYSIGHT TECHNOLOGIES SINGAPORE (HOLDINGS) PTE. LTD.
Reel/Frame 044222/0695 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 13, 2015
From: BERGERON, MATTHEW R.
To: IXIA
Reel/Frame 036777/0001 →