Method for fabricating a semiconductor package with conductive carrier integrated heat spreader
View Patent ↗In one implementation, a semiconductor package includes a control conductive carrier having a die side and an opposite input/output (I/O) side connecting the semiconductor package to a mounting surface. The semiconductor package also includes a control FET of a power converter switching stage having a control drain attached to the die side of the control conductive carrier. The control conductive carrier is configured to sink heat produced by the control FET into the mounting surface. The semiconductor package includes a sync conductive carrier having another die side and another opposite I/O side connecting the semiconductor package to the mounting surface, and a sync FET of the power converter switching stage having a sync source attached to the die side of the sync conductive carrier.
1. A method for fabricating a semiconductor package, said method comprising:
providing a contiguous conductive carrier having a die side and an opposite input/output (I/O) side;
providing a control FET and a sync FET of a power converter switching stage, said control FET having a control drain and said sync FET having a sync source;
attaching said control drain of said control FET and said sync source of said sync FET to said die side of said contiguous conductive carrier;
forming a control conductive carrier attached to said control drain and a sync conductive carrier attached to said sync source from said contiguous conductive carrier;
said control conductive carrier and said sync conductive carrier configured to sink heat produced, respectively, by said control FET and said sync FET into a mounting surface for said semiconductor package.
2. The method claim 1 , wherein said contiguous conductive carrier comprises a lead frame.
3. The method claim 1 , wherein said contiguous conductive carrier is pre-patterned.
4. The method claim 1 , wherein said control FET and said sync FET comprise silicon FETs.
5. The method claim 1 , wherein said control FET and said sync FET comprise III-Nitride FETs.
6. The method claim 1 , wherein said power converter switching stage is implemented as part of a buck converter.
7. A method for fabricating a semiconductor package, said method comprising:
providing a contiguous conductive carrier having a die side and an input/output (I/O) side;
providing a control FET and a sync FET, said control FET having a control drain and said sync FET having a sync source;
attaching said control drain of said control FET and said sync source of said sync FET to said die side of said contiguous conductive carrier;
forming a control conductive carrier attached to said control drain;
said control conductive carrier configured to sink heat produced by said control FET into a mounting surface for said semiconductor package.
8. The method claim 7 , wherein said contiguous conductive carrier comprises a lead frame.
9. The method claim 7 , wherein said contiguous conductive carrier is pre-patterned.
10. The method claim 7 , wherein said control FET and said sync FET comprise silicon FETs.
11. The method claim 7 , wherein said control FET and said sync FET comprise III-Nitride FETs.
12. The method claim 7 , wherein said control FET and said sync FET are part of a power converter switching stage.
13. The method claim 12 , wherein said power converter switching stage is part of a buck converter.
14. A method for fabricating a semiconductor package, said method comprising:
providing a contiguous conductive carrier having a die side and an input/output (I/O) side;
providing a control FET and a sync FET, said control FET having a control drain and said sync FET having a sync source;
attaching said control drain of said control FET and said sync source of said sync FET to said die side of said contiguous conductive carrier;
forming a sync conductive carrier attached to said sync source;
said sync conductive carrier configured to sink heat produced by said sync FET into a mounting surface for said semiconductor package.
15. The method claim 14 , wherein said contiguous conductive carrier comprises a lead frame.
16. The method claim 14 , wherein said contiguous conductive carrier is pre-patterned.
17. The method claim 14 , wherein said control FET and said sync FET comprise silicon FETs.
18. The method claim 14 , wherein said control FET and said sync FET comprise M-Nitride FETs.
19. The method claim 14 , wherein said control FET and said sync FET are part of a power converter switching stage.
20. The method claim 19 , wherein said power converter switching stage is part of a buck converter.