Method for controlling the breakdown of an antifuse memory cell

1. A method, comprising:

controlling an antifuse memory cell formed on an active area of a semiconductor substrate, the controlling including:

applying a programming voltage to a terminal of the antifuse memory cell;

detecting a breakdown in the antifuse memory cell, the detecting including detecting a bulk current generated in a portion of the substrate that is outside of the active area; and

interrupting the applying of the programming voltage after a time period after detecting the breakdown, wherein the interrupting includes:

interrupting the applying of the programming voltage in response to detecting the breakdown at a first time; and

interrupting the applying of the programming voltage at a second time equal to the first time plus the time period.

2. The method of claim 1 wherein detecting the breakdown includes comparing the bulk current with a first threshold current and the time period is determined by testing a plurality of antifuse memory cells of determined characteristics.

3. The method of claim 1 wherein:

the active area is a well surrounded by a peripheral insulator, the well being above a buried layer of a first conductivity type that is opposite to a second conductivity type of the well, the buried layer being contacted by a peripheral wall of the first conductivity type that extends from the buried layer to at least partially surround the substrate; and

detecting the current generated in the substrate comprises detecting a bulk current from a bulk terminal formed on a portion of the substrate separated from the active area by the peripheral insulator.

4. The method of claim 3 wherein the antifuse memory cell is formed above a region that is adjacent to one or more MOS transistors, at least one of the one or more MOS transistors being electrically coupled to a reference terminal.

5. The method of claim 1 wherein detecting the breakdown includes detecting an end of a breakdown time by comparing the current generated in the substrate with a first threshold current.

6. A device, comprising:

a substrate having a well of a first conductivity type and a buried layer of a second conductivity type different from the first conductivity type, the well being on the buried layer;

a peripheral insulator surrounding the well;

an antifuse memory cell formed on the semiconductor substrate, above the well surrounded by the peripheral insulator;

a bulk terminal coupled to a portion of the substrate that is separated from the well by the peripheral insulator;

a detector configured to detect a bulk current on the bulk terminal; and

a first comparator configured to detect breakdown of the antifuse memory cell by determining that the bulk current has reached a first threshold at a first time; and

a programming circuit configured to:

apply a programming voltage,

interrupt applying the programming voltage at a second time equal to the first time plus a selected time period.

7. The device of claim 6 , further comprising a second comparator configured to compare the substrate current with a second threshold.

8. The device of claim 7 , wherein the first comparator is configured to detect that the bulk current exceed the first threshold and the second comparator is configured to detect that the bulk current has decreased down to the second threshold.

9. The device of claim 6 , wherein the first comparator is configured to detect that the bulk current exceed the first threshold and is configured to detect that the bulk current has decreased down to a second threshold less than the first threshold.

10. A method, comprising:

controlling an antifuse memory cell formed on an active area of a semiconductor substrate, the controlling including:

applying a programming voltage to a terminal of the antifuse memory cell;

detecting a bulk current generated in a portion of the substrate that is outside of the active area;

determining a breakdown end by detecting when the bulk current reaches a first threshold current;

determining a post-breakdown end by detecting when the bulk current has decreased from the first threshold current to a second threshold current;

interrupting the applying of the programming voltage in response to determining the post-breakdown end, wherein:

the active area is a portion of the substrate that is surrounded by a peripheral insulator at first and second sides of the active area; and

detecting the bulk current generated in the portion of the substrate that is outside of the active area comprises detecting the bulk current from a bulk terminal formed on a portion of the substrate separated from the active area by the peripheral insulator.

11. The method of claim 10 wherein the bulk current at the breakdown end is at a first value and the bulk current at the post-breakdown end is between 30% and 70% of the first value.

12. The method of claim 10 wherein:

the active area is a well; and

the semiconductor substrate comprises a bulk region.

13. The method of claim 12 , wherein the well and the bulk region respectively overlie a buried layer of a first conductivity type that is opposite a second conductivity type of the well and bulk region, and wherein a peripheral well of the first conductivity type extends from the buried layer to surround the well and bulk region.

14. The method of claim 10 , wherein determining the post-breakdown end by detecting when the bulk current reaches the second threshold current comprises detecting when the bulk current reaches the second threshold current in a decreasing fashion.