Method for fabricating semiconductor apparatus
View Patent ↗A method for fabricating a semiconductor apparatus includes forming a diffusion barrier film on a semiconductor substrate, forming a first film on a semiconductor substrate including a common source region, forming a second film on the first film, forming a conductive film on the second film, patterning the conductive film and the second film, to form an active pattern, and patterning the first film and the semiconductor substrate using the active pattern as a mask, to form a pillar; and forming a gate electrode on an outer circumference of the pillar.
1. A method for fabricating a semiconductor apparatus, the method comprising:
forming a first film on a semiconductor substrate including a common source region;
forming a second film on the first film;
forming a conductive film on the second film;
patterning the conductive film and the second film, to form an active pattern; and
patterning the first film and the semiconductor substrate using the active pattern as a mask, to form a pillar; and forming a gate electrode on an outer circumference of the pillar, wherein the first film includes an undoped polysilicon film and the second film includes a doped polysilicon film.
2. The method of claim 1 , wherein a material of the first film is different from materials of the semiconductor substrate and the second film.
3. The method of claim 1 , wherein the first film functions as a LDD (lightly doped drain) region and the second film functions as a drain.
4. The method of claim 1 , wherein the forming of the gate electrode includes:
forming a gate insulating film on an exposed semiconductor substrate;
forming a conductive material on the semiconductor substrate in which the gate insulating film is formed;
spacer-etching the conductive material, resulting in a spacer-etched conductive material, to be formed on the outer circumference of the pillar; and
etching back the gate insulating film and the spacer-etched conductive material to have substantially the same height as a top surface of the patterned semiconductor substrate.
5. The method of claim 1 , further comprising:
forming an ohmic contact film between the second film and the conductive film.
6. A method for fabricating a semiconductor apparatus, the method comprising:
providing a semiconductor substrate including a first region and a second region;
forming a diffusion barrier film on the first and second regions of the semiconductor substrate;
forming a semiconductor film with a conductive type on the first and second regions of the semiconductor substrate on which the diffusion barrier film is formed;
forming an ohmic contact film on the semiconductor film;
forming a conductive film on the ohmic contact film;
forming a pillar structure by patterning the conductive film, the ohmic contact film, the semiconductor film, and the diffusion barrier film, and patterning the semiconductor substrate to a predetermined depth, resulting in a patterned semiconductor substrate; and
forming a gate electrode surrounding an outer circumference of the pillar structure.
7. The method of claim 6 , further comprising:
forming a common source region in the first region of the semiconductor substrate.
8. The method of claim 7 , wherein the common source region has the same conductivity type as the semiconductor film.
9. The method of claim 6 , wherein the diffusion barrier film includes an undoped polysilicon film.
10. The method of claim 9 , wherein the semiconductor film includes a doped polysilicon film.
11. The method of claim 6 , further comprising:
forming a sacrificial film on the diffusion barrier film of the second region between the forming the diffusion barrier film and the forming the semiconductor film.
12. The method of claim 11 , wherein the forming the pillar structure:
patterning the conductive film, the ohmic contact film and the semiconductor film to have a structure of an active pattern, thereby forming a lower electrode, an ohmic contact pattern and a drain in the first region;
removing the sacrificial film of the second region;
patterning the diffusion barrier film using the lower electrode, as a mask, thereby forming a LDD region; and
recessing the semiconductor substrate using the lower electrode as the mask, thereby forming the pillar structure.
13. The method of claim 6 , wherein the first region is a cell region and the second region is a peripheral region.
14. The method of claim 6 , further comprising:
forming a variable resistance layer on a lower electrode of the pillar structure; and
forming an upper electrode on the variable resistance layer.