IP Library Granted Patent US 10,184,977
Granted Patent B2
US 10,184,977 · App. 14/847,236 · Granted Jan 22, 2019

Devices and methods for testing integrated circuits

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Quick Facts
Patent No.
US 10,184,977
App. No.
14/847,236
Granted
Jan 22, 2019
Kind
B2
Abstract

An integrated circuit includes a first power unit, a second power unit, and a selection switch. The first power unit generates a first output voltage and is coupled to a first load pin. The first load pin is coupled to a first load. The second power unit generates a second output voltage and is coupled to a second load pin. The second load pin is coupled to a second load. The selection switch outputs either the first output voltage or the second output voltage to a voltage pin according to a selection signal.

Claims (43)

1. An integrated circuit, comprising:

a first power circuit, configured to generate a first output voltage coupled to a first load pin, the first load pin being further coupled to a first load that is external to the integrated circuit;

a second power circuit, configured to generate a second output voltage coupled to a second load pin, the second load pin being further coupled to a second load that is external to the integrated circuit;

a selection switch, configured to output either the first output voltage or the second output voltage to a voltage pin according to a selection signal; and

a voltmeter coupled to the selection switch via the voltage pin, the voltmeter being configured to measure the first output voltage and the second output voltage output by the selection switch and to generate a voltage signal indicative of the measured first output voltage and the measured second output voltage.

2. The integrated circuit of claim 1 , wherein the selection switch is a multiplexer.

3. The integrated circuit of claim 1 , wherein each of the first load and the second load is a resistor or an electronic load.

4. The integrated circuit of claim 1 , wherein the selection switch is further configured to serially output the first output voltage and the second voltage to the voltage pin.

5. An integrated-circuit testing device, comprising:

an integrated circuit, comprising:

a first power circuit, configured to generate a first output voltage, the first power circuit being coupled to a first load pin;

a second power circuit, configured to generate a second output voltage, the second power circuit being coupled to a second load pin; and

a selection switch, configured to output either the first output voltage or the second output voltage to a voltage pin according to a selection signal;

an integrated-circuit socket, comprising:

an integrated-circuit slot, configured to receive the integrated circuit, wherein the integrated circuit is detachable when placed in the integrated-circuit slot;

a first load probe, coupled to the first load pin, the first load pin configured to be coupled to a first load external to the integrated circuit; and

a second load probe, coupled to the second load pin, the second load pin configured to be coupled to a second load external to the integrated circuit;

a voltmeter, coupled to the voltage pin via a voltage probe, the voltmeter being configured to measure, according to a measurement signal, a voltage at the voltage probe and to generate a voltage signal; and

a processor configured to generate the selection signal and the measurement signal, and to receive the voltage signal.

6. The integrated-circuit testing device of claim 5 , wherein the selection switch is a multiplexer.

7. The integrated-circuit testing device of claim 5 , wherein each of the first load and the second load is a resistor or an electronic load.

8. The integrated-circuit testing device of claim 5 , wherein the processor is further configured to:

generate, according to a testing logic, the selection signal and the measurement signal,

serially output the first output voltage and the second output voltage to the voltage pin,

serially measure the first voltage and the second voltage, and

store the first output voltage and the second voltage in a register.

9. An integrated-circuit testing method in an integrated-circuit testing device having an integrated circuit, an integrated-circuit socket, a voltmeter, and a processor, the integrated circuit having (i) a first power circuit configured to generate a first output voltage, the first power circuit being coupled to a first load pin, (ii) a second power circuit configured to generate a second output voltage, the second power circuit being coupled to a second load pin, and (iii) a selection switch configured to output either the first output voltage or the second output voltage to a voltage pin according to a selection signal, the integrated-circuit socket having (i) an integrated-circuit slot configured to receive the integrated circuit, the integrated circuit being detachable when placed in the integrated-circuit slot, (ii) a first load probe coupled to the first load pin, the first load pin configured to be coupled to a first load that is external to the integrated circuit, and (iii) a second load probe coupled to the second load pin, the second load pin configured to be coupled to a second load that is external to the integrated circuit, the voltmeter being coupled to the voltage pin via a voltage probe and configured to measure, according to a measurement signal, a voltage at the voltage probe and to generate a voltage signal, the method comprising:

respectively drawing a first load current and a second load current from the first power circuit and the second power circuit by the first load and the second load;

outputting, by the processor, either the first output voltage or the second output voltage to the voltage pin according to the selection signal; and

measuring, by the processor, the first output voltage and the second output voltage according to the measurement signal.

10. The integrated-circuit testing method of claim 9 , further comprising:

serially outputting, by the processor, the first output voltage and the second output voltage according to the selection signal;

serially measuring, by the processor, the first output voltage and the second output voltage according to the measurement signal; and

storing, by the processor, the first output voltage and the second output voltage in a register.

11. The integrated circuit of claim 1 , wherein:

the first load and the second load is each associated with a first resistance and a second resistance, respectively,

the processor is further configured to measure a first load current drawn by the first power circuit via the first load pin by dividing the first output voltage by the first resistance, and to measure a second load current drawn by the second power circuit via the second load pin by dividing the second output voltage by the second resistance.

12. The integrated circuit of claim 1 , wherein the processor is further configured to generate a measurement signal, and

wherein the voltmeter is further coupled to the processor, the voltmeter being configured to measure the first output voltage and the second output voltage output by the selection switch in response to receiving the measurement signal.

13. The integrated circuit of claim 12 , wherein the voltmeter is coupled to the selection switch via a voltage probe that is coupled to the voltage pin, and

wherein the selection switch is configured to prevent a voltage drop of the first output voltage and the second output voltage through the voltage probe and the voltage pin as the first power circuit and the second power circuit generates the first and the second output voltages, respectively.

14. The integrated circuit of claim 13 , wherein the first power circuit and the second power circuit generate the first and the second output voltage, respectively, as a result of current drawn by the first load via the first load pin and the second load via the second load pin, respectively.

15. The integrated circuit of claim 1 , wherein the selection switch is coupled directly to an output of the first power circuit and the second power circuit, respectively, within the integrated circuit such that the first output voltage and the second output voltage measured by the voltmeter are internal integrated circuit voltage measurements.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 11, 2015
From: VIA TELECOM CO., LTD.
To: INTEL CORPORATION
Reel/Frame 037096/0075 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 8, 2015
From: TSAI, HAN-YAO
To: VIA TELECOM CO., LTD.
Reel/Frame 036509/0199 →