Back-illuminated integrated imaging device with simplified interconnect routing
A back-illuminated integrated imaging device is formed from a semiconductor substrate including a zone of pixels bounded by capacitive deep trench isolations. A peripheral zone is located outside the zone of pixels. A continuous electrically conductive layer forms, in the zone of pixels, an electrode in a trench for each capacitive deep trench isolation, and forms, in the peripheral zone, a redistribution layer for electrically coupling the electrode to a biasing contact pad. The electrode is located in the trench between a trench dielectric and at least one material for filling the trench.
1. A back-illuminated integrated imaging device, comprising:
a semiconductor substrate including a back side and a front side;
a zone of pixels, configured to be illuminated from the back side of the semiconductor substrate, bounded by capacitive deep trench isolations formed in trenches located in the semiconductor substrate and extending into the back side of the semiconductor substrate;
a peripheral zone located outside said zone of pixels;
contact pads at the back side of the semiconductor substrate including a biasing contact pad; and
a continuous electrically conductive layer configured to form, in said zone of pixels, an electrode in each capacitive deep trench isolation, and to form, in said peripheral zone, a redistribution layer at the back side of the semiconductor substrate electrically coupled to the electrode in each capacitive deep trench isolation and electrically coupled to said biasing contact pad for applying a voltage for biasing said electrode in each capacitive deep trench isolation;
wherein said electrode in each capacitive deep trench isolation is located between a trench dielectric and at least one material for filling said trenches.
2. The device according to claim 1 , further comprising at least one electrically conductive via making contact with said redistribution layer and electrically coupled to said biasing contact pad.
3. The device according to claim 2 , further comprising:
an electrically conductive and optically opaque terminal layer located above said peripheral zone at the back side of the semiconductor substrate, said terminal layer making contact with said at least one electrically conductive via; and
an electrically conductive connection connecting said terminal layer and said biasing contact pad.
4. The device according to claim 1 , wherein the continuous electrically conductive layer further forms a continuous grid at edges of the trenches at the back side of the semiconductor substrate, and wherein the continuous electrically conductive layer comprises a lateral extension connected to the continuous grid so as to form said redistribution layer and extending from at least one of the trenches located at a periphery of said zone of pixels to said peripheral zone.
5. The device according to claim 4 , wherein the lateral extension forms a continuous peripheral ring around the continuous grid.
6. The device according to claim 4 , further comprising at least one electrically conductive via making contact with said redistribution layer and electrically coupled to said biasing contact pad, and wherein said at least one electrically conductive via makes contact with said lateral extension.
7. The device according to claim 1 , wherein said continuous electrically conductive layer comprises at least one material chosen from the group consisting of titanium, titanium nitride, tungsten and aluminum.
8. The device according to claim 1 , further comprising:
an antireflection layer, containing silicon oxide and silicon nitride, located above the substrate outside the trenches at the back side of the semiconductor substrate; and
at least one dielectric underlayer extending into the trenches under the continuous electrically conductive layer and outside the trenches between the antireflection layer and the continuous electrically conductive layer, said at least one dielectric underlayer forming, in each trench, said trench dielectric.
9. The device according to claim 8 , wherein said at least one material for filling said trenches is located, in the trenches and outside the trenches, above the continuous electrically conductive layer.
10. The device according to claim 1 , further comprising:
a dielectric including a material containing negative fixed charges located on walls of the trenches and outside the trenches above the substrate; and
an antireflection layer located at least partially above the dielectric, said dielectric forming, in each trench, said trench dielectric.
11. The device according to claim 10 , wherein the dielectric is a dielectric having a dielectric constant greater than or equal to 15.
12. The device according to claim 10 , wherein said at least one material for filling said trenches is located, in the trenches and outside the trenches, above the continuous electrically conductive layer, said antireflection layer also being located above the at least one material for filling said trenches.
13. The device according to claim 10 , wherein the dielectric comprises an oxide layer covered with the material containing negative fixed charges.
14. The device according to claim 10 , wherein the material containing negative fixed charges is selected from the group consisting of HfO 2 , ZrO 2 and Al 2 O 3 or an alloy of two or more of HfO 2 , ZrO 2 and Al 2 O 3 .
15. The device according to claim 10 , wherein the antireflection layer comprises tantalum oxide.
16. A back-illuminated integrated imaging device, comprising:
a semiconductor substrate including a back side and a front side;
a capacitive deep trench isolation formed in a trench located in the semiconductor substrate and extending into the back side of the semiconductor substrate, said trench surrounding a pixel region configured to be illuminated from the back side of the semiconductor substrate;
a peripheral zone located outside said pixel region;
contact pads including a biasing contact pad; and
an electrically conductive layer including a first layer portion extending in the trench of the capacitive deep trench isolation to form an electrode and a second portion in the peripheral zone forming a redistribution layer at the back side of the semiconductor substrate that is electrically connected to the biasing contact pad;
wherein said electrode in each capacitive deep trench isolation is located between a trench dielectric and at least one material for filling said trenches.
17. The device according to claim 16 , wherein the electrically conductive layer further forms a grid at edges of the trenches.
18. The device according to claim 17 , wherein the electrically conductive layer comprises a lateral extension forming a continuous peripheral ring around the grid.
19. The device according to claim 16 , wherein said electrically conductive layer is formed of a material selected from the group consisting of titanium, titanium nitride, tungsten and aluminum.
20. The device according to claim 16 , further comprising:
an antireflection layer located above the substrate outside the trench at the back side of the semiconductor substrate; and
at least one dielectric underlayer extending into the trench under the continuous electrically conductive layer and outside the trench between the antireflection layer and the continuous electrically conductive layer.
21. The device according to claim 16 , further comprising:
a dielectric including a material containing negative fixed charges located on walls of the trench and outside the trench above the substrate, said dielectric forming, in each trench, said trench dielectric; and
an antireflection layer located at least partially above the dielectric.
22. The device according to claim 21 , wherein the dielectric comprises an oxide layer covered with the material containing negative fixed charges.
23. The device according to claim 21 , wherein the material containing negative fixed charges is selected from the group consisting of HfO 2 , ZrO 2 and Al 2 O 3 or an alloy of two or more of HfO 2 , ZrO 2 and Al 2 O 3 .
24. A back-illuminated integrated imaging device, comprising:
a semiconductor substrate;
a zone of pixels bounded by capacitive deep trench isolations formed in trenches located in the semiconductor substrate;
a peripheral zone located outside said zone of pixels;
contact pads including a biasing contact pad; and
a continuous electrically conductive layer configured to form, in said zone of pixels, an electrode in each capacitive deep trench isolation, and to form, in said peripheral zone, a redistribution layer electrically coupled to the electrode in each capacitive deep trench isolation and electrically coupled to said biasing contact pad for applying a voltage for biasing said electrode in each capacitive deep trench isolation;
wherein said electrode in each capacitive deep trench isolation is located between a trench dielectric and at least one material for filling said trenches; and
wherein the continuous electrically conductive layer further forms a continuous grid at edges of the trenches, and wherein the continuous electrically conductive layer comprises a lateral extension connected to the continuous grid so as to form said redistribution layer and extending from at least one of the trenches located at a periphery of said zone of pixels to said peripheral zone.
25. The device according to claim 24 , wherein the lateral extension forms a continuous peripheral ring around the continuous grid.
26. The device according to claim 24 , further comprising at least one electrically conductive via making contact with said redistribution layer and electrically coupled to said biasing contact pad, and wherein said at least one electrically conductive via makes contact with said lateral extension.
27. A back-illuminated integrated imaging device, comprising:
a semiconductor substrate;
a zone of pixels bounded by capacitive deep trench isolations formed in trenches located in the semiconductor substrate;
a peripheral zone located outside said zone of pixels;
contact pads including a biasing contact pad;
a continuous electrically conductive layer configured to form, in said zone of pixels, an electrode in each capacitive deep trench isolation, and to form, in said peripheral zone, a redistribution layer electrically coupled to the electrode in each capacitive deep trench isolation and electrically coupled to said biasing contact pad for applying a voltage for biasing said electrode in each capacitive deep trench isolation;
wherein said electrode in each capacitive deep trench isolation is located between a trench dielectric and at least one material for filling said trenches;
a dielectric including a material containing negative fixed charges located on walls of the trenches and outside the trenches above the substrate; and
an antireflection layer located at least partially above the dielectric, said dielectric forming, in each trench, said trench dielectric.
28. The device according to claim 27 , wherein the dielectric is a dielectric having a dielectric constant greater than or equal to 15.
29. The device according to claim 27 , wherein said at least one material for filling said trenches is located, in the trenches and outside the trenches, above the continuous electrically conductive layer, said antireflection layer also being located above the at least one material for filling said trenches.
30. The device according to claim 27 , wherein the dielectric comprises an oxide layer covered with the material containing negative fixed charges.
31. The device according to claim 27 , wherein the material containing negative fixed charges is selected from the group consisting of HfO 2 , ZrO 2 and Al 2 O 3 or an alloy of two or more of HfO 2 , ZrO 2 and Al 2 O 3 .
32. The device according to claim 27 , wherein the antireflection layer comprises tantalum oxide.
33. A back-illuminated integrated imaging device, comprising:
a semiconductor substrate;
a capacitive deep trench isolation formed in a trenches located in the semiconductor substrate and surrounding a pixel region;
a peripheral zone located outside said pixel region;
contact pads including a biasing contact pad;
an electrically conductive layer including a first layer portion extending in the trench of the capacitive deep trench isolation to form an electrode and a second portion in the peripheral zone forming a redistribution layer that is electrically connected to the biasing contact pad;
wherein said electrode in each capacitive deep trench isolation is located between a trench dielectric and at least one material for filling said trenches;
a dielectric including a material containing negative fixed charges located on walls of the trench and outside the trench above the substrate, said dielectric forming, in each trench, said trench dielectric; and
an antireflection layer located at least partially above the dielectric.
34. The device according to claim 33 , wherein the dielectric comprises an oxide layer covered with the material containing negative fixed charges.
35. The device according to claim 33 , wherein the material containing negative fixed charges is selected from the group consisting of HfO 2 , ZrO 2 and Al 2 O 3 or an alloy of two or more of HfO 2 , ZrO 2 and Al 2 O 3 .
36. A back-illuminated integrated imaging device, comprising:
a semiconductor substrate;
a capacitive deep trench isolation formed in a trenches located in the semiconductor substrate and surrounding a pixel region;
a peripheral zone located outside said pixel region;
contact pads including a biasing contact pad;
an electrically conductive layer including a first layer portion extending in the trench of the capacitive deep trench isolation to form an electrode and a second portion in the peripheral zone forming a redistribution layer that is electrically connected to the biasing contact pad;
wherein said electrode in each capacitive deep trench isolation is located between a trench dielectric and at least one material for filling said trenches;
an antireflection layer located above the substrate outside the trench; and
at least one dielectric underlayer extending into the trench under the continuous electrically conductive layer and outside the trench between the antireflection layer and the continuous electrically conductive layer.