IP Library Granted Patent US 9,553,210
Granted Patent B2
US 9,553,210 · App. 14/851,409 · Granted Jan 24, 2017

High frequency power diode and method for manufacturing the same

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Quick Facts
Patent No.
US 9,553,210
App. No.
14/851,409
Granted
Jan 24, 2017
Kind
B2
Abstract

High frequency power diode including a semiconductor wafer having first and second main sides, a first layer of a first conductivity type formed on the first main side, a second layer of a second conductivity type formed on the second main side and a third layer of the second conductivity type formed between the first layer and the second layer. The first layer has a dopant concentration decreasing from 10 19 cm −3 or more adjacent to the first main side of the wafer to 1.5·10 15 cm −3 or less at an interface of the first layer with the third layer. The second layer has a dopant concentration decreasing from 10 19 cm −3 or more adjacent to the second main side of the wafer to 1.5·10 15 cm −3 at an interface of the second layer with the third layer and the third layer has a dopant concentration of 1.5·10 15 cm −3 or less.

Claims (34)

1. A high frequency power diode, comprising:

a semiconductor wafer having a first main side and a second main side opposite to the first main side;

a first layer formed in the semiconductor wafer adjacent to the first main side, the first layer having a first conductivity type which is either n- or p-type conductivity;

a second layer formed in the semiconductor wafer adjacent to the second main side, the second layer having a second conductivity type which is either n- or p-type conductivity but different from the first conductivity type;

a third layer formed in the semiconductor wafer between the first layer and the second layer the third layer having the second conductivity type;

wherein the first layer has a first conductivity type dopant concentration decreasing from 10 19 cm −3 or more adjacent to the first main side of the wafer to 1.5·10 15 cm −3 or less at an interface of the first layer with the third layer;

wherein the second layer has a second conductivity type dopant concentration decreasing from 10 19 cm −3 or more adjacent to the second main side of the wafer to 1.5·10 15 cm −3 at an interface of the second layer with the third layer;

wherein the third layer has a second conductivity type dopant concentration of 1.5·10 15 cm −3 or less; and

wherein the first conductivity type dopant concentration in the first layer at a distance of 50 μm from the first main side and the second conductivity type dopant concentration in the second layer at a distance of 50 μm from the second main side is 10 17 cm −3 or more, respectively, and the thickness of the third layer is less than 60 μm.

2. The high frequency power diode according to claim 1 , wherein the first layer and the second layer each have a surface doping concentration of at least 7·10 19 cm −3 .

3. The high frequency power diode according to claim 1 , wherein phosphorous is a second conductivity type dopant in the second layer.

4. The high frequency power diode according to claim 1 , wherein boron is a first conductivity type dopant in the first layer.

5. The high frequency power diode according to claim 1 , wherein the semiconductor wafer is a silicon wafer.

6. The high frequency power diode according to claim 1 , wherein the semiconductor wafer has a thickness of 150 μm or more.

7. The high frequency power diode according to claim 1 , wherein a doping concentration profile is generated by simultaneous diffusion of a first conductivity type dopant into the first main side and of a second conductivity type dopant into the second main side.

8. The high frequency power diode according to claim 1 , comprising recombination centers to decrease the carrier lifetime.

9. The high frequency power diode according to claim 1 , comprising electron irradiation induced traps.

10. The high frequency power diode according to claim 1 , wherein the thickness of the third layer is less than two ambipolar diffusion lengths.

11. A method for manufacturing a high frequency power diode, the method comprising:

(a) providing a semiconductor wafer having a first main side and a second main side; and

(b) diffusing a first conductivity type dopant into the semiconductor wafer from its first main side and a second conductivity type dopant into the semiconductor wafer from its second main side while keeping respective surface concentrations of the first main side and second main side constant during the diffusing step.

12. The method according to claim 11 , further comprising a step of thinning the semiconductor wafer to a thickness between 150 and 250 μm.

13. The method according to claim 11 , further comprising a step of forming recombination centers in the semiconductor wafer.

14. The method according to claim 13 , wherein the recombination centers are induced by electron irradiation of the semiconductor wafer.

15. A method for manufacturing a high frequency power diode, the method comprising:

(a) providing a semiconductor wafer having a first main side and a second main side; and

(b) diffusion of a first conductivity type dopant into the semiconductor wafer from its first main side and the diffusion of a second conductivity type dopant into the second main side of the semiconductor wafer occurring at least substantially at the same time.

16. The method according to claim 11 , further comprising a step of forming a base layer in the semiconductor wafer.

17. The method according to claim 11 , the diffusing step including doping the semiconductor wafer using a carrier gas enriched with a precursor for a desired dopant in gaseous form.

18. The method according to claim 15 , further comprising a step of thinning the semiconductor wafer to a thickness between 150 and 250 μm.

19. The method according to claim 15 , further comprising a step of forming recombination centers in the semiconductor wafer.

20. The method according to claim 19 , wherein the recombination centers are induced by electron irradiation of the semiconductor wafer.

21. The method according to claim 15 , further comprising a step of forming a base layer in the semiconductor wafer.

22. The method according to claim 15 , the diffusing step including doping the semiconductor wafer using a carrier gas enriched with a precursor for a desired dopant in gaseous form.

Assignments (6)
MERGER Recorded Nov 13, 2023
From: HITACHI ENERGY SWITZERLAND AG
To: HITACHI ENERGY LTD
Reel/Frame 065549/0576 →
CHANGE OF NAME Recorded Dec 31, 2021
From: ABB POWER GRIDS SWITZERLAND AG
To: HITACHI ENERGY SWITZERLAND AG
Reel/Frame 058666/0540 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 6, 2020
From: ABB SCHWEIZ AG
To: ABB POWER GRIDS SWITZERLAND AG
Reel/Frame 052916/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INVENTOR (ILJA MULLER) PREVIOUSLY RECORDED ON REEL 037097 FRAME 0239. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT OF ASSIGNORS INTEREST. Recorded Feb 14, 2017
From: HOMOLA, JAROSLAV; PODZEMSKY, JIRI; RADVAN, LADISLAV; MULLER, ILJA
To: ABB TECHNOLOGY AG
Reel/Frame 041709/0045 →
MERGER Recorded Sep 16, 2016
From: ABB TECHNOLOGY AG
To: ABB SCHWEIZ AG
Reel/Frame 040055/0769 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 20, 2015
From: HOMOLA, JAROSLAV; PODZEMSKY, JIRI; RADVAN, LADISLAV; MULLER, LLJA
To: ABB TECHNOLOGY AG
Reel/Frame 037097/0239 →