IP Library Granted Patent US 9,686,862
Granted Patent B2
US 9,686,862 · App. 14/858,759 · Granted Jun 20, 2017

Capacitors for multilayer printed circuit boards

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Quick Facts
Patent No.
US 9,686,862
App. No.
14/858,759
Granted
Jun 20, 2017
Kind
B2
Abstract

A capacitor in a multilayer printed circuit board is described. The capacitor may include a via of a via-in-pad type and a dielectric mixture filled in the via of the via-in-pad type. The via may be disposed under an integrated circuit contact pad of the multilayer printed circuit board. The dielectric mixture may include a nanoparticle-sized dielectric powder mixed with an adhesive material.

Claims (41)

1. A filter capacitor, a bypass capacitor, or a decoupling capacitor in a multilayer printed circuit board comprising:

a via of a via-in-pad type that is disposed directly under an integrated circuit (IC) contact pad of the multilayer printed circuit board, wherein the via includes a via contact pad with a first size that matches a second size of the IC contact pad; and

a dielectric mixture filled in the via, wherein:

the dielectric mixture includes a nanoparticle-sized dielectric powder mixed with an adhesive material;

individual dielectric particles of the nanoparticle-sized dielectric powder are between about 1 and 100 nanometers in size; and

individual dielectric particles in the dielectric mixture do not exceed about 100 nanometers in size;

wherein the filter capacitor, the bypass capacitor, or the decoupling capacitor is configured to filter or shunt signals at frequencies of 25 gigahertz (GHz) and higher.

2. The filter capacitor, the bypass capacitor, or the decoupling capacitor of claim 1 , wherein the dielectric powder includes one of barium-strontium titanate, magnesium doped barium-strontium titanate, antimony doped barium-strontium titanate, titanium dioxide, and tantalum pentoxide.

3. A capacitor in a multilayer printed circuit board comprising:

a via of a via-in-pad type that is disposed under an integrated circuit (IC) contact pad of the multilayer printed circuit board; and

a dielectric mixture filled in the via of the via-in-pad type, wherein:

the dielectric mixture includes a nanoparticle-sized dielectric powder mixed with an adhesive material;

individual dielectric particles of the nanoparticle-sized dielectric powder are between about 1 and 100 nanometers in size;

a percentage of the nanoparticle-sized dielectric powder in the dielectric mixture is greater than 80% by volume; and

the dielectric powder includes one of magnesium doped barium-strontium titanate, antimony doped barium-strontium titanate, and tantalum pentoxide;

wherein the capacitor is configured to filter or shunt signals at frequencies of 25 gigahertz (GHz) or higher; and

wherein a forward transmission coefficient of the capacitor is less than about −20 decibels between signal frequencies of 12.5 GHz and 50 GHz.

4. The capacitor of claim 3 , wherein the adhesive material includes polymers.

5. The capacitor of claim 3 , wherein the adhesive material includes an epoxy resin with a bonding agent, a curing agent, a dispersing agent, and a catalyst.

6. The capacitor of claim 5 , wherein the dispersing agent prevents cluster formation of the dielectric power in the epoxy resins.

7. The capacitor of claim 3 , wherein the adhesive material includes glass epoxy adhesive and the dielectric mixture further includes glass frit.

8. The capacitor of claim 3 , wherein a thermal coefficient of expansion of the dielectric mixture is less than 0.01 millimeter per Celsius degree.

9. The capacitor of claim 3 , wherein the via includes a contact pad with a first size that matches a second size of the IC contact pad.

10. The capacitor of claim 3 , wherein the IC contact pad includes one of a ball grid array (BGA) pad and a power contact pad.

11. The capacitor of claim 3 , wherein the dielectric powder includes antimony doped barium-strontium titanate.

12. A capacitor in a multilayer printed circuit board comprising:

a coaxial via of a via-in-pad type that is disposed under an integrated circuit (IC) contact pad of the multilayer printed circuit board, wherein:

the coaxial via includes a via contact pad disposed under and in contact with the IC contact pad;

the via contact pad includes nickel-barrier and copper;

the coaxial via of the via-in-pad type further includes an outer via wall, an inner via wall, and a dielectric mixture filled between the outer via wall and the inner via wall;

the inner via wall is coaxially aligned with the outer via wall; and

the dielectric mixture includes a nanoparticle-sized dielectric powder mixed with an adhesive material;

wherein the capacitor is configured to transmit about 2.0% or less of signals with frequencies between 12.5 gigahertz (GHz) and 50 GHz.

13. The capacitor of claim 12 , wherein the adhesive material includes polymers.

14. The capacitor of claim 12 , wherein the adhesive material includes epoxy resin with a bonding agent, a curing agent, a dispersing agent, and a catalyst.

15. The capacitor of claim 14 , wherein the dispersing agent prevents cluster formation of the dielectric powder in the epoxy resins.

16. The capacitor of claim 12 , wherein the adhesive material includes glass epoxy adhesive and the dielectric mixture further includes glass frit.

17. The capacitor of claim 12 , wherein a percentage of the dielectric power in the dielectric mixture is greater than 80% by volume.

18. The capacitor of claim 12 , wherein a thermal coefficient of expansion of the dielectric mixture is less than 0.01 millimeter per Celsius degree.

19. The capacitor of claim 12 , wherein the coaxial via includes a contact pad with a first size that matches a second size of the IC contact pad.

20. The capacitor of claim 12 , wherein the IC contact pad includes one of a ball grid array (BGA) pad and a power contact pad.

Assignments (5)
PATENT RELEASE AND REASSIGNMENT Recorded Jul 5, 2022
From: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
To: II-VI INCORPORATED; MARLOW INDUSTRIES, INC.; EPIWORKS, INC.; LIGHTSMYTH TECHNOLOGIES, INC.; KAILIGHT PHOTONICS, INC.; COADNA PHOTONICS, INC.; OPTIUM CORPORATION; FINISAR CORPORATION; II-VI OPTICAL SYSTEMS, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; II-VI DELAWARE, INC.; II-VI OPTOELECTRONIC DEVICES, INC.; PHOTOP TECHNOLOGIES, INC.
Reel/Frame 060574/0001 →
SECURITY INTEREST Recorded Jul 1, 2022
From: II-VI INCORPORATED; II-VI DELAWARE, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; PHOTOP TECHNOLOGIES, INC.; COHERENT, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 060562/0254 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2020
From: FINISAR CORPORATION
To: II-VI DELAWARE, INC.
Reel/Frame 052286/0001 →
NOTICE OF GRANT OF SECURITY INTEREST IN PATENTS Recorded Sep 25, 2019
From: II-VI INCORPORATED; MARLOW INDUSTRIES, INC.; EPIWORKS, INC.; LIGHTSMYTH TECHNOLOGIES, INC.; KAILIGHT PHOTONICS, INC.; COADNA PHOTONICS, INC.; OPTIUM CORPORATION; FINISAR CORPORATION; II-VI OPTICAL SYSTEMS, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; II-VI DELAWARE, INC.; II-VI OPTOELECTRONIC DEVICES, INC.; PHOTOP TECHNOLOGIES, INC.
To: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 050484/0204 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 18, 2015
From: DAGHIGHIAN, HENRY MEYER
To: FINISAR CORPORATION
Reel/Frame 036603/0662 →