IP Library Granted Patent US 9,613,995
Granted Patent B2
US 9,613,995 · App. 14/864,912 · Granted Apr 4, 2017

Method of manufacturing semiconductor device

Inventors: Tse-Wei Chung (Taichung, TW); Tsung-Hui Chou (New Taipei, TW); Hsu-Ting Chang (Taipei, TW)
Assignee: Powerchip Technology Corporation
H01L27/14623H01L27/1462H01L27/14625H01L27/14636H01L27/14685
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Quick Facts
Patent No.
US 9,613,995
App. No.
14/864,912
Granted
Apr 4, 2017
Kind
B2
Abstract

A semiconductor device including a substrate, at least one sensor, a dielectric layer, at least one light pipe structure, at least one pad, a shielding layer, and a protection layer is provided. The sensor is located in the substrate of a first region. The dielectric layer is located on the substrate. The light pipe structure is located in the dielectric layer of the first region. The light pipe structure corresponds to the sensor. The pad is located in the dielectric layer of a second region. The shielding layer is located on the dielectric layer, wherein the light pipe structure is surrounded by the shielding layer. The protection layer is located on the shielding layer. At least one pad opening is disposed in the dielectric layer, the shielding layer, and the protection layer above the pad. The pad opening exposes a top surface of the corresponding pad.

Claims (22)

1. A method for manufacturing a semiconductor device, comprising:

providing a substrate, wherein the substrate has a first region and a second region;

forming at least one sensor in the substrate of the first region;

forming a dielectric layer on the substrate of the first region and the second region;

forming at least one light pipe structure in the dielectric layer of the first region, wherein the light pipe structure corresponds to the sensor;

forming at least one pad in the dielectric layer of the second region;

forming a shielding layer on the dielectric layer, wherein the shielding layer surrounds the light pipe structure; and

forming a protection layer on the shielding layer, wherein at least one pad opening is formed in the dielectric layer, the shielding layer and the protection layer above the pad for exposing a top surface of the corresponding pad.

2. The method for manufacturing the semiconductor device as claimed in claim 1 , wherein a method for forming the at least one light pipe structure in the dielectric layer of the first region comprises:

forming the shielding layer on the dielectric layer, wherein the shielding layer has at least one first opening corresponding to the sensor;

taking the shielding layer as a mask to remove a part of the dielectric layer, so as to form a light pipe opening;

forming a light filter material layer on the dielectric layer for filling the light pipe opening and covering the shielding layer; and

removing a part of the light filter material layer to expose a surface of the shielding layer.

3. The method for manufacturing the semiconductor device as claimed in claim 2 , wherein a method for removing the part of the light filter material layer comprises a chemical mechanical polishing method.

4. The method for manufacturing the semiconductor device as claimed in claim 2 , wherein the light pipe opening exposes a surface of the substrate.

5. The method for manufacturing the semiconductor device as claimed in claim 2 , wherein a part of the dielectric layer is located between a bottom surface of the light pipe opening and a surface of the substrate.

6. The method for manufacturing the semiconductor device as claimed in claim 1 , wherein before the step of forming the light pipe structure in the dielectric layer of the first region, the method further comprises:

forming at least two metal interconnects in the dielectric layer of the first region, such that the light pipe structure is located between the metal interconnects.

7. The method for manufacturing the semiconductor device as claimed in claim 1 , wherein a method for forming the pad opening comprises:

forming a mask layer on the protection layer, wherein the mask layer has at least one second opening, and the second opening corresponds to the pad; and

taking the mask layer as a mask to remove a part of the protection layer, a part of the shielding layer and a part of the dielectric layer to expose a surface of the pad.

8. The method for manufacturing the semiconductor device as claimed in claim 1 , wherein a material of the protection layer comprises a low temperature material layer, and the low temperature material layer comprises SiN, SiO, TaO or a combination thereof.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 16, 2019
From: POWERCHIP TECHNOLOGY CORPORATION
To: POWERCHIP SEMICONDUCTOR MANUFACTURING CORPORATION
Reel/Frame 049770/0199 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 2, 2015
From: CHUNG, TSE-WEI; CHOU, TSUNG-HUI; CHANG, HSU-TING
To: POWERCHIP TECHNOLOGY CORPORATION
Reel/Frame 036709/0223 →
Priority Claims (1)
TW 104121918 A · Jul 6, 2015 · national
Continuity (1)
Related Publication 20170012070A1 · Jan 12, 2017