Phase controller apparatus and methods
A phase controller includes a plurality of pulse width modulation (PWM) circuits, a plurality of switching devices, a computing unit, and a latency generator. The plurality of PWM circuits output pulse signals. The plurality of switching devices are coupled to the respective plurality of PWM circuits, and switch on and off based on the pulse signals. The computing unit calculates the pulse signals to be output from the plurality of PWM circuits, based on outputs of the plurality of switching devices. The latency generator generates latency in any of the pulse signals so that edge positions of the pulse signals output from the plurality of PWM circuits do not collide with each other, wherein the pulse signals change values at the edge positions.
1. A phase controller comprising:
a plurality of pulse width modulation (PWM) circuits configured to output pulse signals;
a plurality of switching devices, each coupled to a corresponding one of the plurality of PWM circuits, configured to switch on and off based on the pulse signals;
a computing unit configured to calculate a duty ratio of each pulse signal of the plurality of pulse signals to be output from the plurality of PWM circuits, based on outputs of the plurality of switching devices; and
a latency generator configured to calculate a latency for at least one pulse signal of a plurality of pulse signals and provide the latency in one or more delayable units to the at least one pulse signal of the plurality of pulse signals such that no edge positions of the plurality of pulse signals output from the plurality of PWM circuits collide with each other, wherein the plurality of pulse signals change values at the edge positions, wherein the latency generator is configured to generate a table for each of the plurality of pulse signals, and wherein each table is configured to indicate positions of changing state of a corresponding pulse signal.
2. The phase controller of claim 1 , wherein the delayable unit is a time width of a minimum resolution of latency adjustment supported by the phase controller.
3. The phase controller of claim 1 , wherein the latency generator is configured to shift the positions of changing state of the at least one pulse signal of the plurality of pulse signals when the positions of changing state of the at least one pulse signal collide with at least one other pulse signal of the plurality of pulse signals.
4. The phase controller of claim 1 , wherein the latency generator is configured to divide the at least one pulse signal of the plurality of pulse signals to generate the table.
5. The phase controller of claim 1 , wherein the latency generator is configured to assigned predetermined lengths to the edge positions in the tables.
6. The phase controller of claim 1 , wherein the latency generator further comprises at least one shift register configured to shift the edge positions indicated in the table generated for the at least one pulse signal of the plurality of pulse signals when the edge positions indicated in the table generated for the at least one pulse signal collide with at least one other pulse signal of the plurality of pulse signals.
7. The phase controller of claim 1 , wherein edge positions of the at least one pulse signal of the plurality of signals, have at least one predetermined length in the corresponding table.
8. The phase controller of claim 7 , wherein an on edge position of the edge positions has a first length and an off edge position of the edge positions has a second length.
9. The phase controller of claim 1 , wherein the latency generator is further configured to divide the latency into a plurality of portions and provide the latency as the plurality of portions to the at least one pulse signal over a plurality of periods, wherein each portion of the plurality of portions includes one or more delayable units.
10. The phase controller of claim 9 , wherein the latency generator is configured to provide the latency as the plurality of portions to the at least one pulse signal in alternate periods of the at least one pulse signal.
11. A light modulation system comprising:
a plurality of light emitting diodes (LEDs);
a plurality of pulse width modulation (PWM) circuits configured to output pulse signals;
a plurality of drivers, each driver coupled to a corresponding PWM circuit of the plurality of PWM circuits and coupled to a corresponding LED of the plurality of LEDs, each driver, of the plurality of drivers, configured to switch the corresponding LED on and off based on a pulse signal;
a computing unit configured to calculate a duty ratio of each pulse signal of the plurality of pulse signals to be output from the plurality of PWM circuits, based on outputs of the plurality of drivers; and
a latency generator configured to calculate a latency for at least one pulse signal of a plurality of pulse signals and provide the latency in one or more delayable units to the at least one pulse signal of the plurality of pulse signals such that that edge positions of the plurality of pulse signals output from the plurality of PWM circuits do not collide with each other, wherein the plurality of pulse signals change values at the edge positions, wherein the latency generator is configured to generate a table for each of the plurality of pulse signals, wherein each table is configured to indicate positions of changing state of a corresponding pulse signal, and wherein the latency generator is further configured to calculate the latency for the at least one pulse signal based on the data indicating the edge positions of the plurality of pulse signals.
12. The light modulation system of claim 11 , wherein the latency generator comprises:
a table generator configured to generate tables for the pulse signals calculated by the computing unit, the tables including information to distinguish the edge positions; and
a latency calculator configured to calculate the latency which does not cause collision of the edge positions of the plurality of pulse signals, based on the tables.
13. The light modulation system of claim 12 , wherein the latency generator further comprises at least one shift register configured to shift the edge positions indicated in the table generated for the at least one pulse signal of the plurality of pulse signals when the edge positions indicated in the table generated for the at least one pulse signal collide with at least one other pulse signal of the plurality of pulse signals.
14. The light modulation system of claim 12 , wherein predetermined lengths are assigned to the respective edge positions in the tables.
15. The light modulation system of claim 14 , wherein different lengths are assigned to an on edge position and an off edge position of the edge positions.
16. The light modulation system of claim 11 , wherein the latency generator is further configured to divide the latency into a plurality of portions and provide the latency as the plurality of portions to the at least one pulse signal over a plurality of periods, wherein each portion of the plurality of portions includes one or more delayable units.
17. The light modulation system of claim 16 , wherein the latency generator is configured to provide the latency as the plurality of portions to the at least one pulse signal in alternate periods of the at least one pulse signal.