IP Library Granted Patent US 9,722,040
Granted Patent B2
US 9,722,040 · App. 14/867,327 · Granted Aug 1, 2017

Method for manufacturing an insulated gate bipolar transistor

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Quick Facts
Patent No.
US 9,722,040
App. No.
14/867,327
Granted
Aug 1, 2017
Kind
B2
Abstract

Method for manufacturing an insulated gate bipolar transistor, which includes a drift layer of a first conductivity type between an emitter side, at which a gate and emitter electrode are arranged, and a collector side, at which a collector electrode is arranged including steps: providing a substrate of a second conductivity type, applying a dopant of the first conductivity type on the first side, creating a drift layer of the first conductivity type on the first layer, diffusing the ions such that a buffer layer is created, having a higher doping concentration than the drift layer, creating a base layer of the second conductivity type on the drift layer, creating an emitter layer of the first conductivity type on the base layer, thinning the substrate on the second side such that the remaining part of the substrate forms a collector layer.

Claims (24)

1. A method for manufacturing an insulated gate bipolar transistor, which includes a drift layer of a first conductivity type between an emitter side, at which a gate electrode and an emitter electrode are arranged, and a collector side opposite to the emitter side, at which a collector electrode is arranged, wherein the manufacturing method comprises manufacturing steps in the following order:

providing a substrate of a second conductivity type, which is opposite to the first conductivity type, the substrate of the second conductivity type having a first side and a second side opposite to the first side, and the substrate of the second conductivity type having a doping concentration of 5*10 15 to 1*10 17 cm −3 ,

creating a first layer of the first conductivity type on the first side by applying a dopant of the first conductivity type by epitaxial growth or deposition, resulting in the first layer having a first layer thickness between 0.5 and 2 μm,

creating a drift layer of the first conductivity type on the first layer, which has a low doping concentration,

diffusing the dopant such that a buffer layer is created, the buffer layer having a higher doping concentration than the drift layer, wherein in a direction perpendicular to the second side, the buffer layer does not comprise an area of constant doping concentration,

creating a base layer of the second conductivity type on the drift layer,

creating an emitter layer of the first conductivity type on the base layer,

thinning the substrate on the second side such that the remaining part of the substrate forms a collector layer having the collector side to which the collector electrode is formed.

2. The method for manufacturing an insulated gate bipolar transistor according to claim 1 , characterized in that the substrate has a substrate thickness of at least 300 μm.

3. The method for manufacturing an insulated gate bipolar transistor according to claim 1 , characterized in that the dopant is applied by implantation, in particular with a dose of 1*10 12 to 5*10 13 cm −2 .

4. The method for manufacturing an insulated gate bipolar transistor according to claim 1 , characterized in that the first layer has at least one of a first layer thickness between 0.5 and 1 μm, or a doping concentration of 1*10 16 to 5*10 17 cm −3 .

5. The method for manufacturing an insulated gate bipolar transistor according to claim 4 , characterized in that the step of diffusing comprises diffusing the first layer to at least 5 or at least 10 times the first layer thickness.

6. The method for manufacturing an insulated gate bipolar transistor according to claim 4 , characterized in that a buffer layer thickness of the buffer layer is 5 to 30 μm.

7. The method for manufacturing an insulated gate bipolar transistor according to claim 4 , characterized in that the buffer layer has a maximum doping concentration between 1*10 15 to 5*10 16 cm −3 .

8. The method for manufacturing an insulated gate bipolar transistor according to claim 1 , characterized in that the step of diffusing comprises diffusing the first layer to at least 5 or at least 10 times the first layer thickness.

9. The method for manufacturing an insulated gate bipolar transistor according to claim 1 , characterized in that a buffer layer thickness of the buffer layer is 5 to 30 μm.

10. The method for manufacturing an insulated gate bipolar transistor according to claim 9 , characterized in that the buffer layer thickness of the buffer layer is 10 to 30 μm.

11. The method for manufacturing an insulated gate bipolar transistor according to claim 1 , characterized in that the buffer layer has the same or a higher maximum doping concentration than the collector layer.

12. The method for manufacturing an insulated gate bipolar transistor according to claim 1 , characterized in that the buffer layer has a lower maximum doping concentration than the collector layer.

13. The method for manufacturing an insulated gate bipolar transistor according to claim 1 , characterized in that the buffer layer has a maximum doping concentration between 1*10 15 and 5*10 16 cm −3 .

14. The method for manufacturing an insulated gate bipolar transistor according to claim 1 , characterized in that the collector layer has a collector layer thickness of 3 to 30 μm.

15. The method for manufacturing an insulated gate bipolar transistor according to claim 1 , characterized in that creating the drift layer is done by epitaxial growth.

16. The method for manufacturing an insulated gate bipolar transistor according to claim 1 , characterized in that the step of diffusing comprises diffusing the dopant so that the doping concentration of the buffer layer decreases steadily without keeping a constant part of a doping concentration from the original first layer.

17. The method for manufacturing an insulated gate bipolar transistor according to claim 16 , characterized in that the doping concentration of the buffer layer increases on a side of the buffer layer towards the substrate to a maximum value, from which the doping concentration steadily decreases to the doping concentration of the drift layer, wherein the doping concentration of the drift layer is constant.

Assignments (6)
MERGER Recorded Nov 13, 2023
From: HITACHI ENERGY SWITZERLAND AG
To: HITACHI ENERGY LTD
Reel/Frame 065549/0576 →
CORRECTIVE ASSIGNMENT TO CORRECT THE CONVEYING PARTY "ABB TECHNOLOGY LTD."SHOULD READ "ABB TECHNOLOGY AG" PREVIOUSLY RECORDED AT REEL: 040621 FRAME: 0853. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded May 11, 2022
From: ABB TECHNOLOGY AG.
To: ABB SCHWEIZ AG
Reel/Frame 059927/0758 →
CHANGE OF NAME Recorded Dec 31, 2021
From: ABB POWER GRIDS SWITZERLAND AG
To: HITACHI ENERGY SWITZERLAND AG
Reel/Frame 058666/0540 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 6, 2020
From: ABB SCHWEIZ AG
To: ABB POWER GRIDS SWITZERLAND AG
Reel/Frame 052916/0001 →
MERGER Recorded Nov 15, 2016
From: ABB TECHNOLOGY LTD.
To: ABB SCHWEIZ AG
Reel/Frame 040621/0853 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 20, 2015
From: RAHIMO, MUNAF; ANDENNA, MAXI
To: ABB TECHNOLOGY AG
Reel/Frame 037098/0079 →