IP Library Patent Application 14867513
Patent Application
App. No. 14/867,513

PHOTONIC INTEGRATED CIRCUIT CHIP PACKAGING

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Quick Facts
Patent No.
US None
App. No.
14/867,513
Filed
Sep 28, 2015
Art Unit
2874
USPC
385/14
Abstract

A localized hermetic sealing of a photonic integrated circuit component chip mounted in a photonic integrated circuit device chip to protect a chip-to-chip interface from contamination, thereby enhancing functionality and reliability. A covering lid mounted on or over the component chip is hermetically sealed to the device chip surrounding the component chip forming a localized hermetically sealed area.

Claims (29)

1 . A photonic integrated circuit (PIC) chip device comprising:

a component PIC chip including a component waveguide;

a device PIC chip for receiving the component PIC chip, and a device waveguide optically coupled with the component waveguide;

a covering lid, for covering the component PIC chip; and

a hermetic seal between the covering lid and the device PIC chip forming a localized hermetically sealed area around the component PIC chip.

2 . The device according to claim 1 , wherein the covering lid is integral with the PIC component chip.

3 . The device according to claim 2 , wherein the covering lid comprises a ledge extending from around an end of the component PIC chip.

4 . The device according to claim 3 , wherein the device PIC chip includes a pit; and wherein the component PIC chip is mounted in the pit; and wherein the hermetic seal is provided between the covering lid and an upper surface of the device PIC chip.

5 . The device according to claim 1 , wherein the covering lid is separate from the PIC component chip.

6 . The device according to claim 5 , wherein the covering lid includes a cavity for receiving an upper portion of the component PIC chip.

7 . The device according to claim 5 , further comprising a thermally-conductive heat spreader between the device PIC chip and the covering lid for dissipating heat from the device PIC chip.

8 . The device according to claim 1 , further comprising a first electrical connector on the component PIC chip, and a second electrical connector on the device PIC chip; wherein the first and second electrical connectors are connected within the localized hermetically sealed area.

9 . The device according to claim 8 , wherein the first electrical connector extends from one end of the component PIC chip; and wherein the second electrical connector extends from a bottom of a pit extending into the device PIC chip.

10 . The device according to claim 9 , further comprising an electrically conductive bonding material between the first and second electrical connectors bonding the component PIC chip in the pit.

11 . The device according to claim 1 , wherein the hermetic seal comprises a thermally conductive metal to dissipate heat from the component PIC chip to the device PIC chip.

12 . A method of assembling a photonic integrated circuit (PIC) device comprising:

mounting a component PIC chip onto a PIC device chip;

aligning waveguides on the component PIC chip with waveguides on the device PIC chip;

fixing the component PIC chip to the device PIC chip; and

hermetically sealing a covering lid to an upper surface of the device PIC chip around the component PIC chip, thereby providing a localized hermitically sealed area around the component PIC chip.

13 . The method according to claim 12 , wherein the covering lid is integral with the component PIC chip.

14 . The method according to claim 13 , wherein the covering lid comprises a ledge extending from around an end of the component PIC chip.

15 . The method according to claim 14 , wherein the device PIC chip includes a pit for receiving the component PIC chip; and wherein the hermetically sealing step includes hermetically sealing the covering lid to an upper surface of the device PIC chip.

16 . The method according to claim 13 , wherein the component PIC chip includes a substrate in or on which the waveguide is formed; and

wherein the method further comprises removing a portion of the substrate to form the ledge.

17 . The method according to claim 12 , wherein the hermetically sealing step includes mounting a separate covering lid over the component PIC chip.

18 . The method according to claim 17 , wherein the covering lid includes a cavity for receiving an upper portion of the component PIC chip; and wherein a thermally conductive heat spreader is mounted in the cavity for dissipating heat from the component PIC chip.

19 . The method according to claim 12 , further comprising connecting electrical connectors on the component PIC chip to electrical connectors on the device PIC chip within the hermetically sealed area.

20 . The method according to claim 12 , wherein the hermetically sealing step is conducted under vacuum or any required inert gas atmosphere.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 11, 2023
From: ELENION TECHNOLOGIES LLC
To: NOKIA SOLUTIONS AND NETWORKS OY
Reel/Frame 063284/0464 →
CHANGE OF NAME Recorded Dec 8, 2016
From: CORIANT ADVANCED TECHNOLOGY, LLC
To: ELENION TECHNOLOGIES, LLC
Reel/Frame 040852/0121 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 28, 2015
From: KLEIN, HOLGER; HOCHBERG, MICHAEL J.; NUTTALL, NATHAN A.
To: CORIANT ADVANCED TECHNOLOGY, LLC
Reel/Frame 036670/0687 →