IP Library Granted Patent US 10,013,174
Granted Patent B2
US 10,013,174 · App. 14/871,639 · Granted Jul 3, 2018

Mapping system selection for data storage device

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Quick Facts
Patent No.
US 10,013,174
App. No.
14/871,639
Granted
Jul 3, 2018
Kind
B2
Abstract

A plurality of mapping systems are maintained for mapping logical addresses for data stored in a Data Storage Device (DSD) to physical addresses for locations in at least one memory of the DSD that store the data. Data is received from a host for storage in the at least one memory, and the received data is stored in a location in the at least one memory. A mapping system is selected from the plurality of mapping systems for mapping the received data based on information provided by the host for the received data or based on information determined by the controller for the received data.

Claims (41)

1. A Data Storage Device (DSD), comprising:

a memory for storing data; and

a controller configured to:

maintain a plurality of mapping systems mapping logical addresses for data stored in the memory to physical addresses for locations in the memory that store the data;

receive data from a host for storage in the memory;

store the received data in a location in the memory; and

select a mapping system from the plurality of mapping systems for mapping the received data based on at least one of a priority level for the received data an indication of how frequently the received data has been or is to be accessed, and when the received data was last accessed, wherein a mapping system that has a fastest lookup time among the plurality of mapping systems is selected for mapping data that has a high priority level, that has been or is to be frequently accessed, or that has been recently accessed.

2. The DSD of claim 1 , wherein in selecting the mapping system, the controller uses information provided by the host.

3. The DSD of claim 1 , wherein in selecting the mapping system, the controller uses information determined by the DSD.

4. The DSD of claim 1 , wherein the controller is further configured to select the mapping system that has the fastest lookup time for mapping data with a low latency access requirement.

5. The DSD of claim 1 , wherein the mapping system that has the fastest lookup time requires a least number of memory references to perform a mapping operation as compared to other mapping systems of the plurality of mapping systems.

6. The DSD of claim 1 , further comprising a quick access memory that stores the mapping system that has the fastest lookup time.

7. The DSD of claim 1 , wherein the mapping system that has the fastest lookup time has a smallest size of the plurality of mapping systems.

8. The DSD of claim 1 , wherein the controller is further configured to select a new mapping system of the plurality of mapping systems for mapping data previously mapped by a different mapping system of the plurality of mapping systems based on updated information for the data that is determined by the controller or the host.

9. The DSD of claim 8 , wherein the selection of the new mapping system is part of a garbage collection process performed by the controller to reclaim portions of the memory storing invalid data.

10. A method of operating a Data Storage Device (DSD), the method comprising:

maintaining a plurality of mapping systems mapping logical addresses for data stored in a memory of the DSD to physical addresses for locations in the memory that store the data;

receiving data from a host for storage in the memory;

storing the received data in a location in the memory; and

selecting a mapping system from the plurality of mapping systems for mapping the received data based on at least one of a priority level for the received data, an indication of how frequently the received data has been or is to be accessed, and when the received data was last accessed, wherein a mapping system that has a fastest lookup time among the plurality of mapping systems is selected for mapping data that has a high priority level, that has been or is to be frequently accessed, or that has been recently accessed.

11. The method of claim 10 , wherein information provided by the host is used to select the mapping system.

12. The method of claim 10 , wherein information determined by the DSD is used to select the mapping system.

13. The method of claim 10 , wherein the method further comprises selecting the mapping system that has the fastest lookup time for mapping data with a low latency access requirement.

14. The method of claim 10 , wherein the mapping system that has the fastest lookup time requires a least number of memory references to perform a mapping operation as compared to other mapping systems of the plurality of mapping systems.

15. The method of claim 10 , wherein the mapping system that has the fastest lookup time is stored in a quick access memory.

16. The method of claim 10 , wherein the mapping system that has the fastest lookup time has a smallest size of the plurality of mapping systems.

17. The method of claim 10 , further comprising selecting a new mapping system of the plurality of mapping systems for mapping data previously mapped by a different mapping system of the plurality of mapping systems based on updated information for the data that is determined by the controller or the host.

18. The method of claim 17 , wherein the selection of the new mapping system is part of a garbage collection process to reclaim portions of the memory storing invalid data.

19. A non-transitory computer readable medium storing computer-executable instructions for operating a Data Storage Device (DSD), wherein when the computer-executable instructions are executed by a controller of the DSD, the computer-executable instructions cause the controller to:

maintain a plurality of mapping systems mapping logical addresses for data stored in a memory of the DSD to physical addresses for locations in the memory that store the data;

receive data from a host for storage in the memory;

store the received data in a location in the memory; and

select a mapping system from the plurality of mapping systems for mapping the received data based on at least one of a priority level for the received data, an indication of how frequently the received data has been or is to be accessed, and when the received data was last accessed, wherein a mapping system that has a fastest lookup time among the plurality of mapping systems is selected for mapping data that has a high priority level, that has been or is to be frequently accessed, or that has been recently accessed.

20. A Data Storage Device (DSD), comprising:

a memory for storing data; and

a controller configured to:

maintain a plurality of mapping systems mapping logical addresses for data stored in the memory to physical addresses for locations in the memory that store the data;

receive a logical address for translation to a physical address;

determine whether the DSD or a host in communication with the DSD is in a startup period; and select between a mapping system that has a fastest availability during the startup period and a mapping system that has a fastest lookup time among the plurality of mapping systems to search first for translating the received logical address, wherein in response to determining that the DSD or the host is in the startup period, the mapping system that has the fastest availability during the startup period is selected to be searched first.

21. The DSD of claim 20 , wherein the mapping system that has the fastest availability during the startup period has a smallest size of the plurality of mapping systems.

22. The DSD of claim 20 , wherein the mapping system that has the fastest lookup time requires a least number of memory references to perform a mapping operation as compared to other mapping systems of the plurality of mapping systems.

Assignments (8)
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 038744 FRAME 0481 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0556 →
RELEASE OF SECURITY INTEREST Recorded Mar 5, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 045501/0714 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038722/0229 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038744/0281 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038744/0481 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 30, 2015
From: HORN, ROBERT LYNN
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 036698/0014 →