IP Library Granted Patent US 10,109,256
Granted Patent B2
US 10,109,256 · App. 14/875,667 · Granted Oct 23, 2018

Display panel

Inventors: Takashi Ohno (Kanagawa, JP); Takahiro Imayoshi (Miyazaki, JP); Masakuni Kawagoe (Miyazaki, JP)
Assignee: LAPIS Semiconductor Co., Ltd.
G09G5/003G02F1/1345G02F1/13452H05K7/00G09G2354/00H05K3/361
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Quick Facts
Patent No.
US 10,109,256
App. No.
14/875,667
Granted
Oct 23, 2018
Kind
B2
Abstract

A driver IC has a rectangular shape, and includes a first input terminal group in which first input terminals are disposed at intervals along a first long side, that is opposite a side that faces a display section, from a first short side. A second input terminal group is provided in which second input terminals are disposed at intervals along a second long side that faces the display section, from the first short side. An output terminal group is provided in which output terminals that output signals to the display section are disposed at intervals along the second long side from a position, which is spaced apart for a predetermined distance from where the second input terminals are disposed, to a second short side. A terminal group is not provided at positions that oppose the output terminal group at the first long side.

Claims (13)

1. A driver IC having a rectangular shape, provided such that a longitudinal direction of the driver IC is substantially parallel to a display section of a display panel, and that drives the display section, the driver IC including:

a first short side, a second short side that is positioned at a side opposite the first short side, a first long side that is opposite a side that faces the display section, and a second long side that faces the display section;

a first input terminal group in which first input terminals, closer to the first short side than to the second short side, are disposed at intervals along the first long side;

a second input terminal group in which second input terminals, closer to the first short side than to the second short side, are disposed at intervals along the second long side; and

an output terminal group in which output terminals that output signals to the display section are disposed at intervals along the second long side, the output terminal group being spaced apart for a predetermined distance from the second input terminal group in a direction of the second short side,

wherein a terminal is not provided at any positions on which the first input terminal group is not disposed at the first long side.

2. The driver IC according to claim 1 , wherein an interval between adjacent first input terminals and second input terminals is larger than the interval between the second input terminals and the interval between the output terminals.

3. The driver IC according to claim 1 , wherein the driver IC is configured to accommodate a greater number of input terminals along either of the first long side or the second long side than can be accommodated on either of the first short side or the second short side.

4. The driver IC according to claim 1 , further comprising a CPU interface, a power source circuit and a driving circuit,

wherein the first input terminal group and the second input terminal group are groups of input terminals for the CPU interface and the power source circuit.

5. The driver IC according to claim 1 , wherein the first input terminal group and the second input terminal group are disposed only at one side with respect to the longitudinal direction of the driver IC.

6. The driver IC according to claim 1 , wherein the first input terminal group and the second input terminal group are disposed at an equal distance in a direction along the first short side of the driver IC from a center of the driver IC with respect to the first short side.

7. The driver IC according to claim 1 , wherein the predetermined distance is larger than the intervals at which the second input terminals are disposed along the second long side and the intervals at which the output terminals are disposed along the second long side.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 23, 2016
From: OHNO, TAKASHI; IMAYOSHI, TAKAHIRO; KAWAGOE, MASAKUNI
To: LAPIS SEMICONDUCTOR CO., LTD.
Reel/Frame 038080/0734 →
Priority Claims (1)
JP 2010-049657 · Mar 5, 2010 · national
Continuity (2)
Continuation 13064084 · Mar 4, 2011
Related Publication 20160027400A1 · Jan 28, 2016