IP Library Patent Application 14876540
Patent Application
App. No. 14/876,540

FORMING SELF-ALIGNED CONDUCTIVE LINES FOR RESISTIVE RANDOM ACCESS MEMORIES

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Quick Facts
Patent No.
US None
App. No.
14/876,540
Abstract

Resistive random access memory elements, such as phase change memory elements, may be defined using a plurality of parallel conductive lines over a stack of layers, at least one of which includes a resistive switching material. The stack may be etched using the conductive lines as a mask. As a result, memory elements may be self-aligned to the conductive lines.

Claims (50)

1 . A method, comprising:

forming a stack, wherein the stack includes a barrier layer;

forming a first plurality of trenches and a second plurality of trenches in the barrier layer, wherein trenches of the first plurality of trenches are spaced from each other by trenches of the second plurality of trenches;

filling the first plurality of trenches with a dielectric material;

filling the second plurality of trenches with metal; and

using said metal as a hard mask, removing said stack to form a plurality of stacks separated by the second plurality of trenches.

2 . The method of claim 1 , wherein forming a stack comprises:

forming a chalcogenide layer between a heater layer and an electrode layer; and

forming the barrier layer on the electrode layer.

3 . The method of claim 1 , further comprising:

forming a plurality of electrodes separated by an insulator, wherein the stack is formed on a top surface of the plurality of electrodes separated by the insulator.

4 . The method of claim 1 , wherein filling the second plurality of trenches with metal comprises filling the second plurality of trenches with copper based on a damascene process.

5 . The method of claim 1 , further comprising:

forming a sealing layer over the plurality of stacks, wherein the sealing layer is formed on sidewalls of each stack of the plurality of stacks.

6 . The method of claim 5 , further comprising:

removing the sealing layer from a top surface of each stack of the plurality of stacks.

7 . The method of claim 1 , wherein forming a first plurality of trenches and a second plurality of trenches in the barrier layer comprises:

using a single photolithographic mask, forming the first plurality of trenches and the second plurality of trenches in the barrier layer.

8 . A method, comprising:

forming a first layer including metal conductors separated by a first dielectric material;

forming a stack on the first layer including a barrier layer;

forming a plurality of conductors in the barrier layer, wherein sidewalls of each conductor of the plurality of conductors are in contact with the barrier layer;

separating adjacent ones of the plurality of conductors by a dielectric layer, wherein the dielectric layer is separated from adjacent ones of the plurality of conductors by the barrier layer; and

removing portions of the dielectric layer and the stack down to the first layer to form a plurality of stacks separated by a trench defined by the dielectric layer, wherein the plurality of conductors form a mask.

9 . The method of claim 8 , wherein forming a stack on the first layer comprises:

forming a heater layer on the first layer;

forming a phase change material layer on the resistive layer; and

forming a cap layer on the phase change material layer,

wherein the barrier layer is formed on the electrode layer.

10 . The method of claim, 9 wherein the heater layer is titanium silicon nitride.

11 . The method of claim 9 , wherein the phase change material is based on germanium, antimony, and tellurium.

12 . The method of claim 9 , wherein cap layer is chosen from one of titanium, titanium nitride, and tungsten.

13 . The method of claim 8 , wherein forming a plurality of conductors in the barrier layer, wherein sidewalls of each conductor of the plurality of conductors are in contact with the barrier layer comprises:

forming a first plurality of trenches in the barrier layer based on a mask; and

filling the first plurality of trenches with metal.

14 . The method of claim 13 , wherein separating adjacent ones of the plurality of conductors by a dielectric layer, wherein the dielectric layer is separated from adjacent ones of the plurality of conductors by the barrier layer comprises:

forming a second plurality of trenches in the barrier layer based on the mask, wherein the second plurality of trenches are separated by adjacent ones of the first plurality of trenches; and

filling the second plurality of trenches with a second dielectric material, wherein the barrier layer separates the dielectric material from adjacent ones of the plurality of conductors.

15 . The method of claim 8 , further comprising:

forming a sealing layer over the plurality of stacks; and

removing the sealing layer from at least a top surface of each of the plurality of conductors.

16 . An apparatus, comprising:

a plurality of spaced self-aligned etch structures, wherein each of the self-aligned etch structures includes a resistive switching material disposed between first and second electrodes, and wherein each of the self-aligned etch structures form a memory storage element;

a plurality of metal conductive lines formed on top of respective ones of the plurality of spaced self-aligned etch structures;

a conductive barrier layer disposed between the plurality of spaced self-aligned etch structures; and

a sealing layer formed over the plurality of spaced self-aligned etch structures and the plurality of metal conductive lines, wherein the sealing layer is at least formed on side walls of each of the plurality of spaced self-aligned etch structures.

17 . The apparatus of claim 16 , wherein each of the plurality of spaced self-aligned etch structures includes a heater layer disposed between the resistive switching material and the first electrode.

18 . The apparatus of claim 16 , wherein the conductive barrier layer contacts each of the plurality of metal conductive lines on at least three sides.

19 . The apparatus of claim 16 , wherein the resistive switching material comprises at least one of silver charge complex, SrZrO3, or PrO7CaO3.

20 . The apparatus of claim 16 , wherein the resistive switching material is a phase change material.