IP Library Granted Patent US 9,323,712
Granted Patent B2
US 9,323,712 · App. 14/878,680 · Granted Apr 26, 2016

Hybrid memory blade

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Quick Facts
Patent No.
US 9,323,712
App. No.
14/878,680
Granted
Apr 26, 2016
Kind
B2
Abstract

The present invention is directed to server systems and methods thereof. More specifically, embodiments of the present invention provides a memory controller within a server system, where the memory controller is disengageably connected to one or more processors, a plurality of volatile memory modules, and plurality of solid-state memory modules. This memory controller may be connected to other similarly configured memory controllers. The volatile and solid-state memory modules can be removed and/or replaced. There are other embodiments as well.

Claims (60)

1. A method of operating a server system, the method comprising:

in a network configured with the server system comprising:

an optical interconnect;

a top of rack switch apparatus coupled to the optical interconnect;

an enclosure having a plurality of mounting interfaces for a plurality of servers, each of the servers being coupled to the top of the rack switch apparatus;

a first blade housing structure configured with a length of no more than 900 mm and a width of no more than 500 mm, the first blade housing structure is disengageably coupled to at least one of the mounting interfaces;

a first memory controller module comprising a first processor interface, a plurality of volatile memory interface, a plurality of solid-state memory interfaces, and a plurality of cascade interfaces, the first memory controller being disengageably mounted on the first blade housing structure;

a first processor disengageably mounted to a first mounting interface of the enclosure, the processor being connected to the memory controller via the first processor interface;

a plurality of volatile memory modules disengageably mounted to a plurality of memory mounting interfaces of the first blade housing structure;

a plurality of solid-state memory modules disengageably mounted to a plurality of memory solid state interfaces of the first blade housing structure;

a power management system positioned with the enclosure;

a network interface positioned within the enclosure; and

a thermal management system positioned within the enclosure;

wherein the first processor interface is a QPI interface, HT interface, or ARM processor interface, a high speed serial interface, or a PCI-e interface; and

operating the server system.

2. The method of claim 1 further comprising a plurality of blade housings for memory blade servers, wherein the first blade structure comprises a hybrid memory blade server.

3. The method of claim 1 wherein:

the memory controller module is configured to dynamically assign addresses to the plurality of volatile memory modules;

the plurality of volatile memory modules comprises DRAM modules.

4. The method of claim 1 wherein the plurality of volatile memory modules is configured in an array.

5. The method of claim 1 further comprising a second memory controller module connected to the first memory controller module via a first cascade interface at a bandwidth of at least 10 Gbps.

6. The method of claim 1 wherein the solid-state memory interfaces comprises one or more solid-state controllers.

7. The method of claim 1 wherein the plurality of volatile memory interface comprises a serial connection.

8. The method of claim 1 wherein the plurality of volatile memory interface comprises a plurality of DDRx interfaces.

9. The method of claim 1 wherein the cascade interfaces comprises a serial interface.

10. A method of operating a server system, the method comprising:

in a network configured with the server system, the server system comprising a top of a rack switch apparatus, an optical interconnect, and an enclosure having a plurality of mounting interfaces for a plurality of servers;

a first blade housing structure configured with a length of no more than 900 mm and a width of no more than 500 mm, the first blade housing structure is disengageably coupled to at least one of the mounting interfaces;

a first memory controller module comprising a first processor interface, a plurality of volatile memory interface, a plurality of solid-state memory interfaces, and a plurality of cascade interfaces, the first memory controller being disengageably mounted on the first blade housing structure;

a first processor disengageably mounted to a first mounting interface of the enclosure, the processor being connected to the memory controller via the first processor interface;

a plurality of volatile memory modules disengageably mounted to a plurality of memory mounting interfaces of the first blade housing structure;

a plurality of solid-state memory modules disengageably mounted to a plurality of memory solid state interfaces of the first blade housing structure;

a power management system positioned with the enclosure;

a network interface positioned within the enclosure; and

a thermal management system positioned within the enclosure; and

operating the first memory controller to:

receive a memory allocation request;

evaluate a usage requirement associated with the memory allocation request;

select volatile memory modules and/or solid-state memory modules based on at least one the usage requirement.

11. The method of claim 10 further comprising a second memory controller module connected to the first memory controller module via a first cascade interface at a bandwidth of at least 10 Gbps.

12. The method of claim 10 wherein the solid-state memory interfaces comprises one or more solid-state controllers.

13. The method of claim 10 wherein the plurality of volatile memory interface comprises a serial connection.

14. The method of claim 10 wherein the plurality of volatile memory interface comprises a plurality of DDRx interfaces.

15. The method of claim 10 wherein the cascade interfaces comprises a serial interface.

16. A method for operating a server system, the method comprising:

in a network configured with the server system comprising: a top of a rack switch apparatus, an optical interconnect, and an enclosure having a plurality of mounting interfaces for a plurality of servers;

a first blade housing structure configured with a length of no more than 900 mm and a width of no more than 500 mm, the first blade housing structure is disengageably coupled to at least one of the mounting interfaces;

a first memory controller module comprising a first processor interface, a plurality of volatile memory interface, a plurality of solid-state memory interfaces, and a plurality of cascade interfaces, the first memory controller being disengageably mounted on the first blade housing structure;

a first processor disengageably mounted to a first mounting interface of the enclosure, the processor being connected to the memory controller via the first processor interface;

a plurality of volatile memory modules disengageably mounted to a plurality of memory mounting interfaces of the first blade housing structure;

a plurality of solid-state memory modules disengageably mounted to a plurality of memory solid state interfaces of the first blade housing structure;

a power management system positioned with the enclosure;

a network interface positioned within the enclosure; and

a thermal management system positioned within the enclosure; and

operating the first memory controller to copy data stored in volatile memory modules to the solid-state memory modules in response to one or more predetermined conditions.

17. The method of claim 16 further comprising a second memory controller module connected to the first memory controller module via a first cascade interface at a bandwidth of at least 10 Gbps.

18. The method of claim 16 wherein the solid-state memory interfaces comprises one or more solid-state controllers.

19. The method of claim 16 wherein the plurality of volatile memory interface comprises a serial connection.

20. The method of claim 16 wherein the plurality of volatile memory interface comprises a plurality of DDRx interfaces, and

wherein the cascade interfaces comprises a serial interface.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2021
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE LTD.
Reel/Frame 057336/0873 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2021
From: MARVELL TECHNOLOGY CAYMAN I
To: CAVIUM INTERNATIONAL
Reel/Frame 057279/0519 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 23, 2021
From: INPHI CORPORATION
To: MARVELL TECHNOLOGY CAYMAN I
Reel/Frame 056649/0823 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 4, 2017
From: HAYWOOD, CHRISTOPHER; XU, CHAO; TAMER, FOUAD G.
To: INPHI CORPORATION
Reel/Frame 041851/0155 →