HARDWARE-SUPPORTED PER-PROCESS METADATA TAGS
A memory controller is used to receive a first request for a portion of a physical memory and metadata associated with the portion of the physical memory. The first request for the portion of the physical memory is translated to correspond to an indirect data structure. The indirect data structure comprises a reference to a data line, and a metadata associated with the data line. The data line is formed within the physical memory.
1 . A computer system, comprising:
a physical memory; and
a memory controller coupled with the physical memory, to:
receive a request regarding a portion of the physical memory; and
translate the request regarding the portion of the physical memory to correspond to an indirect data structure that includes a reference to a data line and a metadata associated with the data line,
wherein the data line is formed within the physical memory.
2 . The computer system of claim 1 , wherein the request is by a process and the indirect data structure is specific to the process.
3 . The computer system of claim 2 , wherein: the request is a first request; the process is a first process; the indirect data structure is a first indirect data structure; the memory controller is further to receive a second request by a second process regarding metadata associated with the portion of the physical memory; and the memory controller is further to create a copy of the first indirect data structure to generate a second indirect data structure specific to the second process in response to receiving the second request.
4 . The computer system of claim 1 , wherein the data line is a first data line in a page of the physical memory, the reference is a first reference to the first data line, the page of the physical memory includes at least one more data line, and the indirect data structure includes at least one more reference corresponding to each of the at least one more data lines in the page of the physical memory.
5 . The computer system of claim 4 , wherein the indirect data structure includes k tag bits of metadata for each reference in the indirect data structure, where k is an integer greater than or equal to one.
6 . The computer system of claim 1 , wherein the request is one of a read/load request or a write/store request of data in the physical memory.
7 . The computer system of claim 1 , wherein the request is one of a read/load request or a write/store request of metadata associated with the portion of the physical memory.
8 . The computer system of claim 1 , wherein the request is one of a read/load request or a write/store request of both data in the physical memory and metadata corresponding to the data.
9 . The system as recited in claim 1 , wherein the memory controller is further to:
detect a conflicting request for the metadata; and
resolve the conflict.
10 . The system as recited in claim 7 , wherein the conflicting request is detected in the event that a request for modification of the metadata is received.
11 . The system as recited in claim 7 , wherein the indirect data structure is a first indirect data structure and the conflict is resolved at least in part by creating a second indirect data structure comprising a reference to the data line.
12 . The system as recited in claim 1 , wherein the metadata comprises one or more of the following: an individually software-settable bit, an individually software-settable flag, and an individually software-settable tag.
13 . The system as recited in claim 1 , wherein the data line is reference-counted and automatically released when its reference count goes to zero.
14 . The system as recited in claim 1 , wherein the data line is at least one of deduplicated or immutable.
15 . The system as recited in claim 1 , wherein the indirect data structure is deduplicated.
16 . The system as recited in claim 1 , wherein the metadata is accessed and maintained using an iterator register state.
17 . The system as recited in claim 1 , wherein the request is from one or more of an application, a process, an I/O hardware system, and a memory hardware system.
18 . The system as recited in claim 1 , wherein the memory controller is further to return data to a requester associated with the request.
19 . The system as recited in claim 1 , wherein the indirect data structure is formed within the physical memory.
20 . The system as recited in claim 1 , wherein the metadata includes at least one of requester-specific state information associated with the data line, data indicating whether the data line is dirty or modified, or data indicating whether the reference to the data line is modified.
21 . The system as recited in claim 1 , wherein the metadata includes data indicating at least one of whether the data line is trap-on-write, whether the data is trap-on-read, or whether the data is trap-on-access.
22 . The system as recited in claim 1 , wherein the metadata is writable by a hardware device.
23 . The system as recited in claim 1 , wherein the indirect data structure is hierarchical such that a level associated with the indirect data structure is one of a plurality of indirect data structure levels.
24 . A method comprising:
receiving, at a memory controller, a request regarding a portion of a physical memory and metadata associated with the portion of the physical memory; and
translating the request for the portion of the physical memory and metadata associated with the portion of the physical memory to correspond to an indirect data structure that includes a reference to a data line and a metadata associated with the data line, wherein the data line is formed within the physical memory.
25 . The method as recited in claim 24 , wherein the indirect data structure is formed within the physical memory.