IP Library Granted Patent US 10,176,861
Granted Patent B2
US 10,176,861 · App. 14/882,000 · Granted Jan 8, 2019

RAIDed memory system management

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Quick Facts
Patent No.
US 10,176,861
App. No.
14/882,000
Granted
Jan 8, 2019
Kind
B2
Abstract

A memory system is described, where a plurality of memory modules is connected to a memory controller. Erase operations of the memory modules are coordinated by the memory controller such that, when data is stored in a group of memory modules configured to be a RAID (Redundant Array of Independent “Disks”) group, erase or refresh operations performed on the memory modules of the RAID group are synchronized, scheduled, or controlled to reduce the latency in reading the data stored on the RAID modules.

Claims (34)

1. A memory system, comprising:

memory modules comprising a RAID group, the memory modules having a module controller, a bus interface and a FLASH memory circuit;

wherein the memory modules are connectable to a memory controller, and erase operations of the memory modules are coordinated by the memory controller; and

wherein only one of the memory modules of the RAID group is enabled to perform an erase operation during an interval, and each memory module of the RAID group is enabled to perform the erase operation prior to any one of the memory modules in the RAID group performing the erase operation another time.

2. A memory system, comprising:

memory modules comprising a RAID group, the memory modules having a module controller, a bus interface and a FLASH memory circuit

wherein the memory modules are connectable to a memory controller, and erase operations of the memory modules are coordinated by the memory controller; and

wherein the erase operations of the memory modules in the RAID group are scheduled to enable only one of the modules in an N+1 RAID group to perform erase operations during a time interval.

3. The memory system of claim 1 , wherein status information is sent to another memory module when a memory module in the RAID group completes performing erase operations, and the status information initiates or enables erase operations on the another module.

4. A method of operating a memory system comprising a plurality of memory modules, each memory module having a module controller, a bus interface and a FLASH memory circuit; the memory modules connected to a memory controller using the bus interface; the method comprising:

designating a group of memory modules of the plurality of memory modules as a RAID group; and,

coordinating erase operations of memory modules of the RAID group using the memory controller to enable only one of the modules in an N+1 RAID group to perform erase operations during a time interval.

5. The method of claim 4 , further comprising:

coordinating erase operations such that each memory module of the RAID group is enabled to perform erase operations prior to any one of the memory modules in the RAID group performing erase operations another time.

6. A computer program product for operating a memory system, stored on a non-transient computer readable medium, comprising:

a plurality of memory modules, each memory module having a module controller, a bus interface and a FLASH memory circuit; the memory modules connected to a memory controller using the bus interface; to perform steps of a method comprising:

designating a group of memory modules of the plurality of memory modules as a RAID group; and,

coordinating erase operations of memory modules of the RAID group using the memory controller to enable only one of the modules in an N+1 RAID group to perform erase operations during a time interval.

7. A computer program product for operating a memory system, stored on a non-transient computer readable medium, comprising:

a plurality of memory modules, each memory module having a module controller, a bus interface and a FLASH memory circuit the memory modules connected to a memory controller using the bus interface; to perform steps of a method comprising:

designating a group of memory modules of the plurality of memory modules as a RAID group; and

coordinating erase operations such that each memory module of the RAID group is enabled to perform erase operations prior to any one of the memory modules in the RAID group performing erase operations another time.

8. A memory system, comprising:

a memory controller; and

a plurality of memory modules in communication with the memory controller, a group of the memory modules configured as a RAID (Redundant Array of Independent Disks) group;

wherein erase operations performed by the memory modules of the RAID group are synchronized or scheduled so an erase operation on one of the memory modules of the RAID group is completed prior to initiating an erase operation on another memory module of the RAID group.

9. The memory system of claim 8 , wherein the modules of the RAID group are operated with respect to a common time base.

10. A method of operating a memory system, the memory system comprising a plurality of memory modules in communication with a memory controller and a plurality of memory modules are operated as a RAID group;

the method comprising: storing data to the memory modules of the RAID group, wherein the stored data includes parity data for the data; initiating erase operations on a memory module of the memory modules of the RAID group;

determining that erase operations on the memory module of the group have completed; initiating erase operations on another memory module of the RAID group when the erase operations of the memory module have completed;

receiving a request for data stored on the RAID group; and reading data stored on the RAID group.

11. The method of claim 10 , wherein the step of initiating comprises enabling the memory module to perform erase operations.

12. The method of claim 11 , wherein a number of memory modules of the RAID group enabled to perform erase operations is limited so that data stored on the modules of the RAID group may be read without increased latency due to erase operations being performed when read operations are performed.

13. The method of claim 10 , wherein the step of reading data stored on the RAID group comprises: requesting data from the memory modules of the RAID group; using data received from the memory modules to respond to the read request; or using less than all of the data needed to respond to the read request and the parity data for the data to reconstruct the data needed to respond to the read request; and responding to the read request.

Assignments (7)
CORRECTIVE ASSIGNMENT TO REMOVE US PATENT NO. 9013874 PREVIOUSLY RECORDED UNDER REEL AND FRAME 064272/0249. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 17, 2024
From: VSIP HOLDINGS LLC (F/K/A VIOLIN SYSTEMS LLC)
To: INNOVATIONS IN MEMORY LLC
Reel/Frame 068998/0780 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 13, 2023
From: VSIP HOLDINGS LLC (F/K/A VIOLIN SYSTEMS LLC)
To: INNOVATIONS IN MEMORY LLC
Reel/Frame 064272/0249 →
CHANGE OF NAME Recorded May 25, 2021
From: VIOLIN SYSTEMS LLC
To: VSIP HOLDINGS LLC
Reel/Frame 056366/0849 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 22, 2018
From: ADELMAN, MAXIM; BENNETT, JON C.R.
To: VIOLIN MEMORY, INC
Reel/Frame 044685/0915 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 22, 2018
From: BENNETT, JON C.R.
To: VIOLIN MEMORY, INC.
Reel/Frame 044685/0959 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 22, 2018
From: BENNETT, JON C.R.
To: VIOLIN TECHNOLOGIES
Reel/Frame 044686/0006 →
CHANGE OF NAME Recorded Dec 19, 2017
From: VIOLIN MEMORY, INC.
To: VIOLIN SYSTEMS LLC
Reel/Frame 044908/0680 →