IP Library Granted Patent US 9,595,985
Granted Patent B1
US 9,595,985 · App. 14/882,836 · Granted Mar 14, 2017

Power reduction in noise-cancelling receivers

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Quick Facts
Patent No.
US 9,595,985
App. No.
14/882,836
Granted
Mar 14, 2017
Kind
B1
Abstract

Recently proposed noise-cancelling receivers report a best case trade-off between noise figure and linearity for a matched wideband receiver. These receivers are further improved using a passive front-end gain. The front-end gain reduces the power requirements of the radio frequency transconductance stage, and potentially other stages where, e.g., smaller mixer switches may be employed.

Claims (122)

1. A circuit comprising:

an antenna port;

a noise cancelling receiver comprising:

main-path circuitry characterized by a main-path impedance; and

auxiliary-path circuitry characterized by an auxiliary-path impedance and an auxiliary-path transconductance; and

a passive matching network coupled between the antenna port and the noise cancelling receiver, the passive matching network comprising circuitry providing a gain that is greater than one and reducing a noise cancelling current in the noise cancelling receiver by a factor of at least a square of the gain, where:

a quotient of the main-path impedance divided by a Thevenin-equivalent impedance of a combination of an expected antenna load and the passive matching network matches a product of the auxiliary path impedance and the auxiliary-path transconductance.

2. The circuit of claim 1 , where:

the passive matching network comprises an array of reactances.

3. The circuit of claim 2 , where:

the array comprises an inductor-capacitor network.

4. The circuit of claim 1 , where:

the passive matching network comprises a step-up transformer.

5. The circuit of claim 1 , where:

the passive matching network implements a lowpass filter characteristic.

6. The circuit of claim 1 , where:

the noise cancelling current requirement comprises a noise cancelling transconductance stage current requirement.

7. The circuit of claim 6 , where:

the gain comprises an open-circuit voltage gain, |β|, that is configured to effect a noise figure, F, according to:

F

(

1

+

(

γ

G

M

R

S

β

2

)

)

 where R s represents an antenna impedance, γ represents a constant, and G M represents the auxiliary path transconductance.

8. The circuit of claim 1 , where:

the gain is between 1.5 and 10, inclusive.

9. A circuit comprising:

an antenna configured to obtain a received signal;

matching circuitry coupled to the antenna, the matching configured to apply a gain greater than one to the received signal to obtain an amplified signal and reduce a noise cancelling current by a factor of at least a square of the gain; and

a noise cancelling receiver characterized by the noise cancelling current, the noise cancelling receiver coupled to the matching circuitry and configured to receive the amplified signal, the noise cancelling receiver comprising:

main-path circuitry characterized by a main-path impedance; and

auxiliary-path circuitry characterized by an auxiliary-path impedance and an auxiliary-path transconductance, where:

a quotient of the main-path impedance divided by a Thevenin-equivalent impedance of a combination of the antenna and the matching circuitry matches a product of the auxiliary path impedance and the auxiliary-path transconductance.

10. The circuit of claim 9 , where:

the matching circuitry comprises a passive matching network.

11. The circuit of claim 9 , where:

the matching circuitry comprises a step-up transformer.

12. The circuit of claim 11 , where:

the step-up transformer comprises a wideband step-up transformer.

13. The circuit of claim 9 , where:

the matching circuitry comprises a reactive circuit.

14. The circuit of claim 13 , where:

the reactive circuit comprises an inductor-capacitor circuit.

15. The circuit of claim 9 , where:

the gain comprises an open-circuit voltage gain, |β|, that is configured to effect a noise figure, F, according to:

F

(

1

+

(

γ

G

M

R

S

β

2

)

)

 where R s represents impedance of the antenna, γ represents a constant, and G M represents a transconductance in the noise cancelling receiver.

16. A circuit comprising:

amplification circuitry configured to apply a gain greater than one to a received antenna signal to produce an amplified signal; and

a noise cancelling receiver coupled to the amplification circuitry and configured to apply noise-cancelling processing to the amplified signal, the noise cancelling receiver comprising:

main-path circuitry characterized by a main-path impedance; and

auxiliary-path circuitry characterized by an auxiliary-path impedance and an auxiliary-path transconductance, where:

the amplification circuitry is characterized by an open-circuit voltage gain of beta, |β|>1, that reduces a noise cancelling current requirement in the noise cancelling receiver by more than a factor of |β|, where:

a quotient of the main-path impedance divided by a Thevenin-equivalent impedance of a combination of a modelled antenna load and the amplification circuitry matches a product of the auxiliary path impedance and the auxiliary-path transconductance.

17. The circuit of claim 16 , where:

the noise cancelling current requirement comprises a transconductance stage current requirement; and

the open-circuit voltage gain is configured affect a noise figure for the noise cancelling receiver by a factor of:

(

1

β

2

)

.

18. The circuit of claim 16 , where:

the open-circuit voltage gain is configured to effect a noise figure, F, according to:

F

(

1

+

(

γ

G

M

R

S

β

2

)

)

 where R s Represents Impedance of the Antenna, γ Represents a Constant, and G M represents a transconductance in the noise cancelling receiver.

19. The circuit of claim 16 , further comprising an antenna port configured to supply the modelled antenna load, where the amplification circuitry is coupled between the noise cancelling receiver and the antenna port.

20. The circuit of claim 19 , where the amplification circuitry comprises a passive matching network.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047422 FRAME: 0464. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0702 →
MERGER Recorded Oct 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047422/0464 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 14, 2015
From: MURPHY, DAVID; WU, HAO; DARABI, HOOMAN
To: BROADCOM CORPORATION
Reel/Frame 036792/0745 →