Printed circuit module having a semiconductor device with a protective layer in place of a low-resistivity handle layer
View Patent ↗A printed circuit module having a protective layer in place of a low-resistivity handle layer and methods for manufacturing the same are disclosed. The printed circuit module includes a printed circuit substrate with a thinned die attached to the printed circuit substrate. The thinned die includes at least one device layer over the printed circuit substrate and at least one deep well within the at least one device layer. A protective layer is disposed over the at least one deep well, wherein the protective layer has a thermal conductivity greater than 2 watts per meter Kelvin (W/mK) and an electrical resistivity of greater than 10 6 Ohm-cm.
1. A printed circuit module comprising:
a printed circuit substrate;
a thinned die attached to the printed circuit substrate and having at least one device layer over the printed circuit substrate and at least one deep well within the at least one device layer; and
an outer protective layer over the at least one deep well, wherein the outer protective layer has a thermal conductivity greater than 2 watts per meter Kelvin (W/mK) and an electrical resistivity of greater than 10 6 Ohm-cm.
2. The circuit board of claim 1 further including an inner protective layer that resides between the printed circuit substrate and the thinned die.
3. The printed circuit module of claim 2 wherein the inner protective layer and the outer protective layer are made of a polymer compound.
4. The printed circuit module of claim 3 wherein the outer protective layer is made of ceramic.
5. The printed circuit module of claim 4 wherein the ceramic is aluminum nitride.
6. The printed circuit module of claim 4 wherein the ceramic is silicon nitride.
7. The printed circuit module of claim 2 wherein the inner protective layer is made of ceramic.
8. The printed circuit module of claim 1 wherein the at least one deep well is a deep N-well.
9. The printed circuit module of claim 1 wherein the outer protective layer is made of a polymer compound.
10. The printed circuit module of claim 1 wherein a thickness of the outer protective layer ranges from about 100 μm to around 500 μm.
11. The printed circuit module of claim 1 wherein the thermal conductivity of the protective layer ranges from about 10 W/mK to around 50 W/mK.
12. The printed circuit module of claim 1 wherein the thermal conductivity of the outer protective layer ranges from around about 50 W/mK to around about 6600 W/mK.
13. The printed circuit module of claim 1 wherein the outer protective layer covers a gas filled space over at least a portion of the thinned die.
14. The printed circuit module of claim 13 wherein the at least a portion of the thinned die includes the at least one deep well.
15. The printed circuit module of claim 1 wherein the electrical resistivity of the outer protective layer ranges from about 1012 Ohm-cm to around 1016 Ohm-cm.
16. The printed circuit module of claim 1 wherein the electrical resistivity of the outer protective layer ranges from around about 106 Ohm-cm to around about 1012 Ohm-cm.
17. The printed circuit module of claim 1 further including a mid-protective layer that is disposed between the thinned die and the outer protective layer.
18. The printed circuit module of claim 17 wherein the mid-protective layer is made of ceramic material and the outer protective layer is made of a polymer.
19. The printed circuit module of claim 1 wherein the thinned die is a bulk-complementary metal oxide semiconductor (CMOS) type die.