Early de-allocation of write buffer in an SSD
View Patent ↗A data storage system includes: non-volatile solid state memory including non-volatile storage units and a temporary register; a data storage controller configured to receive a write command including a plurality of logical segments of data from a host; a write buffer allocated to receive a portion of the plurality of logical segments of data and accumulate a physical segment of data corresponding to a write unit of the solid state memory; a solid state memory controller configured to transmit the accumulated data from the write buffer to the temporary storage register each time the write buffer accumulates a physical segment of data. The data storage controller acknowledges completion of the write command to the host after the last logical segment of data is written to the write buffer; and deallocates the write buffer after the solid state memory completes reception of the accumulated data into the temporary storage register.
1. A solid state drive controller comprising:
a controller front end configured to receive a write command including a plurality of logical segments of data;
a buffer, coupled to the controller front end, configured to accumulate the plurality of logical segments of data; and
a memory controller configured to initiate a transfer of the accumulated logical segments of data from the buffer to a temporary register in a nonvolatile solid state memory when the buffer accumulates enough data to program a predetermined number of physical segments of data in the nonvolatile solid state memory;
wherein the memory controller is configured to initiate a deallocation of the buffer after the temporary register completes a reception of the accumulated data from the buffer.
2. The solid state drive controller of claim 1 , wherein the memory controller is configured to send an acknowledgment signal to the controller front end after the temporary register completes the reception of the accumulated data from the buffer.
3. The solid state drive controller of claim 1 , wherein the memory controller is configured to initiate the transfer of the accumulated logical segments of data when the buffer accumulates enough data to program one physical segment of data in the nonvolatile solid state memory.
4. The solid state drive controller of claim 1 , wherein the memory controller is configured to receive programming status information from the nonvolatile solid state memory indicative of whether the transferred data is successfully programmed at the nonvolatile solid state memory.
5. The solid state drive controller of claim 4 , wherein when the programming status information indicates that the programming of the transferred data is unsuccessful, the memory controller is configured to initiate the solid state drive controller to perform a data recovery operation.
6. The solid state drive controller of claim 5 , wherein the data recovery operation comprises reconstructing data using a Reed-Solomon coding scheme.
7. The solid state drive controller of claim 1 , wherein each physical segment of data comprises a smallest unit of data that can be written to the nonvolatile solid state memory.
8. The solid state drive controller of claim 7 , wherein each physical segment of data comprises a flash memory page.
9. The solid state drive controller of claim 1 , wherein the buffer is configured to accumulate the plurality of logical segments one at a time.
10. A method comprising:
receiving, at a controller front end of a solid state drive controller, a write command including a plurality of logical segments of data;
accumulating, at a buffer coupled to the controller front end, the plurality of logical segments of data;
initiating, by a memory controller coupled to the buffer, a transfer of the accumulated logical segments of data from the buffer to a temporary register in a nonvolatile solid state memory when the buffer accumulates enough data to program a predetermined number of physical segments of data in the nonvolatile solid state memory; and
initiating, by the memory controller, a deallocation of the buffer after the temporary register completes a reception of the accumulated data from the buffer.
11. The method of claim 10 , further comprising sending, by the memory controller, an acknowledgment signal to the controller front end after the temporary register completes the reception of the accumulated data from the buffer.
12. The method of claim 10 , further comprising causing, by the memory controller, the transfer of the accumulated logical segments of data when the buffer accumulates enough data to program one physical segment of data in the nonvolatile solid state memory.
13. The method of claim 10 , further comprising receiving, by the memory controller, programming status information from the nonvolatile solid state memory indicative of whether the transferred data is successfully programmed at the nonvolatile solid state memory.
14. The method of claim 13 , wherein when the programming status information indicates that the programming of the transferred data is unsuccessful, the method further comprises causing the solid state drive controller to perform a data recovery operation.
15. The method of claim 14 , wherein the data recovery operation comprises reconstructing data using a Reed-Solomon coding scheme.
16. The method of claim 10 , wherein each physical segment of data comprises a smallest unit of data that can be written to the nonvolatile solid state memory.
17. The method of claim 16 , wherein each physical segment of data comprises a flash memory page.
18. The method of claim 10 , further comprising accumulating, at the buffer, the plurality of logical segments one at a time.
19. A data storage system, comprising:
non-volatile solid state memory comprising non-volatile storage units and a temporary register;
a solid state drive controller comprising:
a controller front end configured to receive a write command including a plurality of logical segments of data;
a buffer, coupled to the controller front end, configured to accumulate the plurality of logical segments of data; and
a memory controller configured to initiate a transfer of the accumulated logical segments of data from the buffer to a temporary register in the nonvolatile solid state memory when the buffer accumulates enough data to program a predetermined number of physical segments of data in the nonvolatile solid state memory;
wherein the memory controller is configured to initiate a deallocation of the buffer after the temporary register completes a reception of the accumulated data from the buffer.
20. The data storage system of claim 19 , wherein the memory controller is configured to receive programming status information from the nonvolatile solid state memory indicative of whether the transferred data is successfully programmed at the nonvolatile solid state memory.