IP Library Granted Patent US 9,722,140
Granted Patent B2
US 9,722,140 · App. 14/907,230 · Granted Aug 1, 2017

Optoelectronic semiconductor chip comprising a multi-quantum well comprising at least one high barrier layer

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,722,140
App. No.
14/907,230
Granted
Aug 1, 2017
Kind
B2
Abstract

An optoelectronic semiconductor chip includes a p-type semiconductor region, an n-type semiconductor region, and an active layer embodied as a multi-quantum well structure arranged between the p-type semiconductor region and the n-type semiconductor region. The multi-quantum well structure includes a plurality of alternating quantum well layers and barrier layers. At least one barrier layer, which is arranged closer to the p-type semiconductor region than to the n-type semiconductor region, is a high barrier layer that has an electronic band gap that is greater than an electronic band gap of the remaining barrier layers.

Claims (18)

1. An optoelectronic semiconductor chip, comprising:

a p-type semiconductor region;

an n-type semiconductor region; and

an active layer arranged between the p-type semiconductor region and the n-type semiconductor region, the active layer comprising a multiple quantum well structure, the multiple quantum well structure having a plurality of alternating quantum well layers and barrier layers, wherein a barrier layer arranged closer to the p-type semiconductor region than to the n-type semiconductor region is a high barrier layer having an electronic band gap E hb that is larger than an electronic band gap E b of other barrier layers, and wherein a quantum well layer that adjoins the high barrier layer on a side facing towards the p-type semiconductor region has an electronic band gap E lw that is smaller than a band gap E w of other quantum well layers.

2. The optoelectronic semiconductor chip according to claim 1 , wherein the high barrier layer has a band gap E hb for which the following applies: E hb −E b ≧0.05 eV.

3. The optoelectronic semiconductor chip according to claim 1 , wherein the multiple quantum well structure has not more than 10 high barrier layers.

4. The optoelectronic semiconductor chip according to claim 3 , wherein first k barrier layers starting from the p-type semiconductor region are high barrier layers, and wherein k is a number between 1 and 10.

5. The optoelectronic semiconductor chip according to claim 1 , wherein the multiple quantum well structure has just one high barrier layer.

6. The optoelectronic semiconductor chip according to claim 5 , wherein the high barrier layer is arranged between a quantum well layer that is a m th quantum well layer starting from the p-type semiconductor region and an immediately adjacent quantum well layer, and wherein m is a number between 1 and 20.

7. The optoelectronic semiconductor chip according to claim 6 , wherein m=1.

8. The optoelectronic semiconductor chip according to claim 1 , wherein the multiple quantum well structure has a plurality of high barrier layers that are arranged closer to the p-type semiconductor region than to the n-type semiconductor region.

9. The optoelectronic semiconductor chip according to claim 1 , wherein the high barrier layer and the other barrier layers each comprise In x Al y Ga 1-x-y P or In x Al y Ga 1-x-y N, where 0≦x≦1, 0≦y≦1 and x+y≦1, and wherein an aluminum content y of the high barrier layer is greater than an aluminum content y of the other barrier layers.

10. The optoelectronic semiconductor chip according to claim 1 , wherein the high barrier layer and the other barrier layers each comprise In x Al y Ga 1-x-y As, where 0≦x≦1, 0≦y≦1 and x+y≦1, and wherein an aluminum content y of the high barrier layer is greater than an aluminum content y of the other barrier layers.

11. The optoelectronic semiconductor chip according to claim 1 , wherein the chip includes at least 10 barrier layers.

12. The optoelectronic semiconductor chip according to claim 11 , wherein the chip includes at least 20 other barrier layers.

13. The optoelectronic semiconductor chip according to claim 1 , wherein the other barrier layers having the band gap E b is at least 5 times as great as a number of high barrier layer(s) having the increased band gap E hb .

14. The optoelectronic semiconductor chip according to claim 1 , wherein the other barrier layers having the band gap E b is at least 10 times as great as a number of high barrier layer(s) having the increased band gap E hb .

15. The optoelectronic semiconductor chip according to claim 1 , wherein the quantum well layer that adjoins the high barrier layer on the side facing towards the p-type semiconductor region has a thickness that is greater than a thickness of other quantum well layers.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 3, 2020
From: OSRAM OPTO SEMICONDUCTORS GMBH
To: OSRAM OLED GMBH
Reel/Frame 051467/0906 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 21, 2016
From: TÅNGRING, IVAR; ERNST, FELIX
To: OSRAM OPTO SEMICONDUCTORS GMBH
Reel/Frame 037782/0090 →