Semiconductor device structures comprising polycrystalline CVD diamond with improved near-substrate thermal conductivity
A semiconductor device structure includes a layer of III-V compound semiconductor material, a layer of polycrystalline CVD diamond material, and an interface region with a diamond nucleation layer. A Raman signal of the diamond nucleation layer exhibits an sp3 carbon peak at 1332 cm −1 having a full width half maximum of no more than 5.0 cm −1 , and one or both of: (i) an sp2 carbon peak at 1550 cm −1 having a height which is no more than 20% of a height of the sp3 carbon peak at 1332 cm −1 after background subtraction when using a Raman excitation source at 633 nm; and (ii) the sp3 carbon peak at 1332 cm −1 is no less than 10% of local background intensity in a Raman spectrum using a Raman excitation source at 785 nm. An average nucleation density at a nucleation surface is no less than 1×10 8 cm −2 and no more than 1×10 12 cm −2 .
1. A semiconductor device structure comprising:
a layer of III-V compound semiconductor material;
a layer of polycrystalline CVD diamond material; and
an interface region between the layer of III-V compound semiconductor material and the layer of polycrystalline CVD diamond material, the interface region including a diamond nucleation layer of polycrystalline CVD diamond which is formed during an initial nucleation phase of polycrystalline CVD diamond growth over a substrate comprising the layer of III-V compound semiconductor material,
wherein the diamond nucleation layer is such that a Raman signal generated by a laser focused on a region comprising the diamond nucleation layer exhibits an sp3 carbon peak at 1332 cm −1 having a full width half-maximum of no more than 5.0 cm −1 ,
wherein the diamond nucleation layer is such that said Raman signal further exhibits one or both of the following characteristics:
(i) an sp2 carbon peak at 1550 cm −1 having a height which is no more than 20% of a height of the sp3 carbon peak at 1332 cm −1 after background subtraction when using a Raman excitation source at 633 nm; and
(ii) the sp3 carbon peak at 1332 cm −1 is no less than 10% of local background intensity in a Raman spectrum using a Raman excitation source at 785 nm, and
wherein an average nucleation density at a nucleation surface of the diamond nucleation layer is no less than 1×10 8 cm −2 and no more than 1×10 12 cm −2 .
2. A semiconductor device structure according to claim 1 , wherein the full width half-maximum of the sp3 carbon peak at 1332 cm −1 is no more than 4.0 cm −1 , 3.0 cm −1 , 2.5 cm −1 , or 2.0 cm −1 .
3. A semiconductor device structure according to claim 1 , wherein the sp2 carbon peak at 1550 cm −1 is no more than 10%, 5%, 1%, 0.1%, 0.01%, or 0.001% of the height of the sp3 carbon peak at 1332 cm −1 after background subtraction when using the Raman excitation source at 633 nm.
4. A semiconductor device structure according to claim 1 , wherein the sp3 carbon peak at 1332 cm −1 is no less than 20%, 30%, 40%, 50%, 60%, or 70% of the local background intensity in the Raman spectrum using the Raman excitation source at 785 nm.
5. A semiconductor device structure according to claim 1 , wherein the average nucleation density at the nucleation surface of the diamond nucleation layer is no less than 5×10 8 cm −2 , 1×10 9 cm −2 , 5×10 9 cm −2 , or 8×10 cm −2 .
6. A semiconductor device structure according to claim 1 , wherein the average nucleation density at the nucleation surface of the diamond nucleation layer is no more than 5×10 11 cm −2 , 1×10 11 cm −2 , 5×10 10 cm −2 , or 3×10 10 cm −2 .
7. A semiconductor device structure according to claim 1 , wherein a mean thickness of the diamond nucleation layer as measured using transmission electron microscopy imaging is no more than 50 nm, 45 nm, 35 nm, 25 nm, or 20 nm.
8. A semiconductor device structure according to claim 1 , wherein the diamond nucleation layer has a volume fraction of voids as measured using transmission electron microscopy imaging of no more than 10% and/or no voids having a thickness greater than 20 nm in a representative sample comprising an area of at least 200 nm×100 nm.
9. A semiconductor device structure according to claim 8 , wherein the volume fraction of voids in the diamond nucleation layer is no more than 8%, 6%, or 4%.
10. A semiconductor device structure according to claim 8 , wherein the diamond nucleation layer comprises no voids having a thickness greater than 15 nm, 10 nm, or 5 nm.
11. A semiconductor device structure according to claim 8 , wherein the diamond nucleation layer has no visible voids discernible in transmission electron microscopy imaging in a representative sample comprising an area of at least 200 nm×100 nm.
12. A semiconductor device structure according to claim 1 , wherein the layer of polycrystalline CVD diamond material has a thickness of at least 5 micrometers, 10 micrometers, 20 micrometers, 30 micrometers, 50 micrometers, 80 micrometers, 100 micrometers, 150 micrometers, 200 micrometers, or 250 micrometers.
13. A semiconductor device structure according to claim 1 , wherein the diamond nucleation layer has a thermal boundary resistance of no more than 50 m 2 K/GW, 35 m 2 K/GW, 30 m 2 K/GW, 25 m 2 K/GW, 20 m 2 K/GW, 15 m 2 K/GW, or 10 m 2 K/GW.
14. A semiconductor device structure according to claim 1 , wherein the III-V compound semiconductor material is gallium nitride.
15. A semiconductor device structure according to claim 1 , wherein the interface region further comprises an adhesion layer disposed between the diamond nucleation layer and the layer of III-V compound semiconductor material.