IP Library Patent Application 14919401
Patent Application
App. No. 14/919,401

LOW VOLTAGE TRANSMITTER

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Quick Facts
Patent No.
US None
App. No.
14/919,401
Abstract

A wireless communications transmitter is divided into N binary weighted communication signal processing paths including both fixed and variable gain communication signal processing chains. Specific bit sequences are used to select a combination of fixed and variable gain signal processing paths to adjust to a desired transmitter output power. Alternately, high and low power communication signal processing paths are chosen as needed with the high power communication signal processing path including an odd order harmonic notch filter.

Claims (37)

1 . A wireless communications transmitter comprising:

two or more communication signal processing paths comprising:

at least a high power communication signal processing path;

at least a low power communication signal processing path; and

a processor coupled to the two or more communication signal processing paths, the processor configured to select, based on a desired transmission output power, one of the two or more communication signal processing paths to process communication signals for transmission.

2 . The wireless communications transmitter of claim 1 further comprising the high power communication signal processing path including an up-converter and one or more notch filters coupled to an output of the up-converter.

3 . The wireless communications transmitter of claim 2 , wherein the up-converter is operative with at least a local oscillator (LO) and the one or more notch filters filter n odd order harmonics (nLO) of an up-converted communication signal.

4 . The wireless communications transmitter of claim 3 , wherein the n odd order harmonics (nLO) comprises at least 3LO.

5 . The wireless communications transmitter of claim 1 , wherein the at least a high power communication signal processing path includes a communication signal processing chain comprising a sequentially coupled input buffer, up-converter, notch filter and variable gain power amplifier driver.

6 . The wireless communications transmitter of claim 5 , wherein the notch filter comprises one or more notch filters to filter n odd order harmonics (nLO) of an up-converted communication signal.

7 . The wireless communications transmitter of claim 1 , wherein the processor configured to select comprises a selection bit sequence for: selecting the at least a high power communication signal processing path or the at least a low power communication signal processing path.

8 . The wireless communications transmitter of claim 1 , wherein the at least a high power communication signal processing path supports 10-15 dB of dynamic range for maximum power.

9 . The wireless communications transmitter of claim 1 , wherein the at least a low power communication signal processing path supports output power at or below 15 dB.

10 . A method in a wireless communications transmitter comprising:

determining a desired transmitter output power;

selecting from two or more communication signal processing paths;

for transmitter high power output:

selecting from a first of the two or more communication signal processing paths, the first communication signal processing path including at least one high power communication signal processing chain;

filtering within the at least one high power communication signal processing chain one or more odd order harmonics of the communication signal; and

amplifying the filtered communication signal; and

for transmitter low power output:

selecting from a second of the two or more communication signal processing paths, the second communication signal processing path including at least one low power communication signal processing chain; and

amplifying the filtered communication signals.

11 . The method of claim 10 , wherein the filtering is performed to filter n odd order harmonics (nLO) of the high power communication signal.

12 . The method of claim 11 , wherein the n odd order harmonics (nLO) comprises at least 3LO.

13 . A mobile communications device comprising:

circuitry including two or more communication signal processing paths comprising:

at least a high power communication signal processing path;

at least a low power communication signal processing path; and

a processor coupled to the two or more communication signal processing paths, the processor configured to select, based on a desired transmission output power, one of the two or more communication signal processing paths to process communication signals for transmission.

14 . The mobile communications device of claim 13 further comprising the high power communication signal processing path including an up-converter and one or more notch filters coupled to an output of the up-converter.

15 . The mobile communications device of claim 14 , wherein the up-converter is operative with at least a local oscillator (LO) and the one or more notch filters filter n odd order harmonics (nLO) of an up-converted communication signal.

16 . The mobile communications device of claim 15 , wherein the n odd order harmonics (nLO) comprises at least 3LO.

17 . The mobile communications device of claim 13 , wherein the at least a high power communication signal processing path includes a communication signal processing chain comprising a sequentially coupled input buffer, up-converter, notch filter and variable gain power amplifier driver.

18 . The mobile communications device of claim 13 , wherein the processor configured to select comprises a selection bit sequence for: selecting the at least a high power communication signal processing path or the at least a low power communication signal processing path.

19 . The mobile communications device of claim 13 , wherein the at least a high power communication signal processing path supports 10-15 dB of dynamic range for maximum power of the desired transmission output power.

20 . The mobile communications device of claim 13 , wherein the at least a low power communication signal processing path supports the desired transmission output power at or below 15 dB.

Assignments (4)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 6, 2015
From: MOHAMMADI, BEHNAM; KAHRIZI, MASOUD; MIRZAEI, AHMAD; PREGARDIER, BERND; LEETE, JOHN CUMMING
To: BROADCOM CORPORATION
Reel/Frame 036979/0245 →