IP Library Patent Application 14920455
Patent Application
App. No. 14/920,455

Blocker-Tolerant Wideband Noise-Canceling Receivers

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Quick Facts
Patent No.
US None
App. No.
14/920,455
Abstract

Because of associated disadvantages of narrow-band off-chip radio-frequency (RF) filtering, a mixer-first receiver front-end designed to tolerate blockers with minimal gain compression and noise factor degradation is disclosed. The mixer-first receiver front-end includes two separate down-conversion paths that help to minimize added noise and voltage gain prior to baseband filtering, which are critical factors in eliminating narrow-band off-chip RF filtering.

Claims (35)

1 . A receiver front-end for receiving a radio-frequency (RF) signal represented by an RF voltage signal and an RF current signal from an antenna, the receiver front-end comprising:

a main down-conversion path comprising: a first passive mixer configured to mix the RF current signal with a local-oscillator (LO) signal to provide a first down-converted signal, and a first transimpedance amplifier configured to apply a first gain to the first down-converted signal to provide a first output signal; and

an auxiliary down-conversion path comprising: a transconductance cell configured to convert the RF voltage signal into a corresponding current signal, a second passive mixer configured to mix the corresponding current signal with the LO signal to provide a second down-converted signal, and a second transimpedance amplifier configured to apply a second gain to the second down-converted signal to provide a second output signal,

wherein the RF voltage signal is a voltage between a source impedance of the antenna and the main down-conversion path, and the RF current signal is a current flowing through the main down-conversion path.

2 . The receiver front-end of claim 1 , wherein the first gain is determined based on the second gain and the source impedance of the antenna.

3 . The receiver front-end of claim 1 , wherein the first gain is proportional to the product of the second gain and the source impedance of the antenna.

4 . The receiver front-end of claim 1 , wherein the transconductance cell is an inverter.

5 . The receiver front-end of claim 1 , further comprising:

a baseband processing block configured to process the first output signal and the second output signal as two ends of a differential signal.

6 . The receiver front-end of claim 1 , further comprising:

a baseband processing block configured to sense the first output signal and the second output signal differentially such that noise from an impedance of the main down-conversion path is canceled and the RF signal is reinforced.

7 . The receiver front-end of claim 6 , wherein the baseband processing block is further configured to low-pass filter and digitize the first output signal and the second output signal.

8 . The receiver front-end of claim 1 , wherein the first passive mixer is included within a first harmonic rejection mixer and the second passive mixer is included within a second harmonic rejection mixer.

9 . The receiver front-end of claim 1 , further comprising a low-pass filter configured to filter the first output signal.

10 . The receiver front-end of claim 9 , wherein the low-pass filter is a switched capacitor filter.

11 . A receiver front-end for receiving a radio-frequency (RF) signal represented by an RF voltage signal and an RF current signal from an antenna, the RF front-end comprising:

a first passive mixer configured to down-convert the RF current signal to provide a first down-converted signal;

a first transimpedance amplifier configured to receive the first down-converted signal from the first passive mixer at a first summing node at virtual ground and apply a first gain to the first down-converted signal to provide a first output signal;

a second passive mixer configured to down-convert a current signal corresponding to the RF voltage signal to provide a second down-converted signal; and

a second transimpedance amplifier configured to receive the second down-converted signal from the second passive mixer at a second summing node at virtual ground and apply a second gain to the second down-converted signal to provide a second output signal,

wherein the RF voltage signal is a voltage between a source impedance of the antenna and the first passive mixer, and the RF current signal is a current flowing through the first passive mixer.

12 . The receiver front-end of claim 11 , wherein the first gain is determined based on the second gain and the source impedance of the antenna.

13 . The receiver front-end of claim 11 , wherein the first gain is proportional to the product of the second gain and the source impedance of the antenna.

14 . The receiver front-end of claim 11 , further comprising:

a baseband processing block configured to process the first output signal and the second output signal as two ends of a differential signal.

15 . The receiver front-end of claim 11 , further comprising:

a baseband processing, block configured to sense the first output signal and the second output signal differentially.

16 . The receiver front-end of claim 15 , wherein the baseband processing block is further configured to low-pass filter and digitize the first output signal and the second output signal.

17 . The receiver front-end of claim 11 . wherein the first passive mixer is included within a first harmonic rejection mixer and the second passive mixer is included within a second harmonic rejection mixer.

18 . The receiver front-end of claim 11 , further comprising a low-pass filter configured to filter the first output signal.

19 . The receiver front-end of claim 18 , wherein the low-pass filter is a switched capacitor filter.

20 . A receiver front-end for receiving a radio-frequency (RF) signal represented by an RF voltage signal and an RF current signal from an antenna, the RF front-end comprising:

a main down-conversion path configured to down-convert the RF current signal to provide a first down-converted signal using a first passive mixer and apply a first gain to the first down-converted signal; and

an auxiliary down-conversion path configured to down-convert a current signal corresponding to the RF voltage signal using a second passive mixer to provide a second down-converted signal and apply a second gain to the second down-converted signal,

wherein the first gain is determined based on the second gain and a source impedance associated with the antenna.

Assignments (4)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 22, 2015
From: ROFOUGARAN, AHMADREZA; DARABI, HOOMAN; MURPHY, DAVID
To: BROADCOM CORPORATION
Reel/Frame 036859/0620 →