Semiconductor device
View Patent ↗A semiconductor device includes a first insulating layer having a first side wall, an oxide semiconductor layer located on the first side wall, a gate insulating layer located on the oxide semiconductor layer, the oxide semiconductor layer being located between the first side wall and the gate insulating layer, a gate electrode facing the oxide semiconductor layer located on the first side wall, the gate insulating layer being located between the oxide semiconductor layer and the gate electrode, a first electrode located below the oxide semiconductor layer and connected with one portion of the oxide semiconductor layer, and a second electrode located above the oxide semiconductor layer and connected with the other portion of the oxide semiconductor layer.
1. A semiconductor device, comprising:
a first insulating layer having a first side wall;
an oxide semiconductor layer located on the first side wall;
a gate insulating layer located on the oxide semiconductor layer, the oxide semiconductor layer being located between the first side wall and the gate insulating layer;
a gate electrode facing the oxide semiconductor layer located on the first side wall, the gate insulating layer being located between the oxide semiconductor layer and the gate electrode;
a first electrode located below the oxide semiconductor layer and connected with a first portion of the oxide semiconductor layer;
a second electrode located above the oxide semiconductor layer and connected with a second portion of the oxide semiconductor layer, and
a third electrode located, at a position above the first insulating layer, between the first insulating layer and the oxide semiconductor layer.
2. The semiconductor device according to claim 1 , wherein the second electrode is connected with the oxide semiconductor layer on a side opposite to the third electrode.
3. The semiconductor device according to claim 1 , wherein the second electrode is connected with the third electrode.
4. The semiconductor device according to claim 1 , wherein the second electrode is connected, at a position above the first insulating layer, with the oxide semiconductor layer.
5. The semiconductor device according to claim 1 , further comprising an underlying layer located in contact with the first insulating layer and the first electrode at a position below the first insulating layer and the first electrode.
6. The semiconductor device according to claim 1 , wherein the gate electrode is located in a ring shape around the first electrode.
7. The semiconductor device according to claim 6 , wherein:
a plurality of the semiconductor devices are located adjacent to each other; and
the first electrodes of the plurality of the semiconductor devices are provided as one integral first electrode, the second electrodes of the plurality of the semiconductor devices are provided as one integral second electrode, and the gate electrodes of the plurality of the semiconductor devices are provided as one integral gate electrode.
8. The semiconductor device according to claim 6 , further comprising a ring-shaped second insulating layer located around the first insulating layer;
wherein:
the second insulating layer has a second side wall facing the first side wall of the first insulating layer; and
the gate electrode is located to face the first side wall and the second side wall.
9. A semiconductor device, comprising:
a first insulating layer having a first side wall;
a first electrode located above the first insulating layer;
an oxide semiconductor layer located on the first side wall and the first electrode, a first portion of the oxide semiconductor layer being connected with the first electrode;
a gate insulating layer located on the oxide semiconductor layer, the oxide semiconductor layer being located between the first side wall and the gate insulating layer;
a gate electrode facing the oxide semiconductor layer located on the first side wall, the gate insulating layer being located between the oxide semiconductor layer and the gate electrode;
a second electrode located below the oxide semiconductor layer and connected with a second portion of the oxide semiconductor layer; and
a third electrode located above the first electrode and connected with the first electrode,
wherein the gate electrode is located in a ring shape around the second electrode.
10. The semiconductor device according to claim 9 , further comprising an underlying layer located in contact with the first insulating layer and the second electrode at a position below the first insulating layer and the second electrode.
11. The semiconductor device according to claim 9 , wherein:
a plurality of the semiconductor devices are located adjacent to each other; and
the second electrodes of the plurality of the semiconductor devices are provided as one integral second electrode, the third electrodes of the plurality of the semiconductor devices are provided as one integral third electrode, and the gate electrodes of the plurality of the semiconductor devices are provided as one integral gate electrode.
12. The semiconductor device according to claim 9 , further comprising a ring-shaped second insulating layer located around the first insulating layer;
wherein:
the second insulating layer has a second side wall facing the first side wall of the first insulating layer; and
the gate electrode is located to face the first side wall and the second side wall.
13. A semiconductor device, comprising:
a first insulating layer having a first side wall;
an oxide semiconductor layer located on the first side wall;
a gate insulating layer located on the oxide semiconductor layer, the oxide semiconductor layer being located between the first side wall and the gate insulating layer;
a gate electrode facing the oxide semiconductor layer located on the first side wall, the gate insulating layer being located between the oxide semiconductor layer and the gate electrode;
a first electrode located below the oxide semiconductor layer and connected with a first portion of the oxide semiconductor layer; and
a second electrode located above the oxide semiconductor layer and connected with a second portion of the oxide semiconductor layer,
wherein the gate electrode is located in a ring shape around the first electrode.
14. The semiconductor device according to claim 13 , further comprising a third electrode located, at a position above the first insulating layer, between the first insulating layer and the oxide semiconductor layer;
wherein the second electrode is connected with the oxide semiconductor layer on a side opposite to the third electrode.
15. The semiconductor device according to claim 13 , further comprising a third electrode located, at a position above the first insulating layer, between the first insulating layer and the oxide semiconductor layer;
wherein the second electrode is connected with the third electrode.
16. The semiconductor device according to claim 13 , wherein the second electrode is connected, at a position above the first insulating layer, with the oxide semiconductor layer.
17. The semiconductor device according to claim 13 , further comprising an underlying layer located in contact with the first insulating layer and the first electrode at a position below the first insulating layer and the first electrode.
18. The semiconductor device according to claim 13 , wherein:
a plurality of the semiconductor devices are located adjacent to each other; and
the first electrodes of the plurality of the semiconductor devices are provided as one integral first electrode, the second electrodes of the plurality of the semiconductor devices are provided as one integral second electrode, and the gate electrodes of the plurality of the semiconductor devices are provided as one integral gate electrode.
19. The semiconductor device according to claim 13 , further comprising a ring-shaped second insulating layer located around the first insulating layer;
wherein;
the second insulating layer has a second side wall facing the first side wall of the first insulating layer; and
the gate electrode is located to face the first side wall and the second side wall.