IP Library Granted Patent US 9,661,251
Granted Patent B1
US 9,661,251 · App. 14/928,536 · Granted May 23, 2017

Adaptive gain control using sample-and-hold circuit for analog CDS

Inventors: Noam Eshel (Pardesia, IL); Golan Zeituni (Kfar-Saba, IL)
Assignee: Sony Semiconductor Solutions Corporation
H04N5/378H04N5/3575
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Quick Facts
Patent No.
US 9,661,251
App. No.
14/928,536
Granted
May 23, 2017
Kind
B1
Abstract

An image processing circuit includes a first sample-and-hold circuit that samples a first data from a pixel, a second sample-and-hold circuit that samples a second data from the pixel, a voltage-to-current circuit that includes a resistor and a current source and receives the first and second data to output a difference data, an adaptive gain control determination circuit that determines whether a rate of change of a signal from the pixel exceeds a threshold based on an output of the second sample-and-hold circuit, and a current-mode ADC that converts the difference data from an analog form to a digital form.

Claims (48)

1. An image processing circuit, comprising:

a first sample-and-hold circuit configured to sample a first data from a pixel;

a second sample-and-hold circuit configured to sample a second data from the pixel;

a voltage-to-current circuit including a resistor and a current source, and configured to receive the first data and the second data and output a difference data;

an adaptive gain control determination circuit configured to determine whether a rate of change of a signal from the pixel exceeds a first predetermined threshold based on an output of the second sample-and-hold circuit; and

a current-mode analog-to-digital converter configured to convert the difference data from an analog form to a digital form.

2. The image processing circuit according to claim 1 , wherein

in a case where the rate of change of the signal exceeds the first predetermined threshold, the adaptive gain control determination circuit is configured to determine that a first analog gain is to be applied, and

in a case where the rate of change of the signal does not exceed the first predetermined threshold, the adaptive gain control determination circuit is configured to determine that a second analog gain is to be applied.

3. The image processing circuit according to claim 2 , wherein the resistor is a variable resistor, and the adaptive gain control determination circuit is configured to set a resistance of the resistor to a first value in a case that the first analog gain is to be applied, and to a second value in a case where the second analog gain is to be applied.

4. The image processing circuit according to claim 2 , wherein the first analog gain is a gain of 1, and the second analog gain is a gain of G, where G>1.

5. The image processing circuit according to claim 4 , wherein the first predetermined threshold is a dynamic range of the pixel divided by G.

6. The image processing circuit according to claim 1 , wherein the second sample-and-hold circuit includes a switched capacitor comparator circuit and a threshold shifter circuit configured to shift a threshold of the switched capacitor comparator circuit.

7. The image processing circuit according to claim 1 , further comprising:

a black sun spot determination circuit configured to determine whether the rate of change of the signal from the pixel exceeds a second predetermined threshold based on the output of the second sample-and hold circuit at a timing different from a timing of the adaptive gain control determination circuit.

8. The image processing circuit according to claim 7 , wherein the second sample-and-hold circuit includes a switched capacitor comparator circuit, a first threshold shifter circuit configured to shift a threshold of the switched capacitor comparator circuit, and a second threshold shifter circuit configured to shift the threshold of the switched capacitor comparator circuit.

9. The image processing circuit according to claim 8 , wherein the first threshold shifter circuit and the second threshold shifter circuit are connected in series.

10. A method of processing an image, comprising:

sampling a first data from a pixel by a first sample-and-hold circuit;

sampling a second data from the pixel by a second sample-and-hold circuit;

receiving the first data and the second data by a voltage-to-current circuit including a resistor and a current source;

outputting a difference data by the voltage-to-current circuit;

determining whether a rate of change of a signal from the pixel exceeds a predetermined threshold by an adaptive gain control determination circuit based on an output of the second sample-and-hold circuit; and

converting the difference data from an analog form to a digital form by a current-mode analog-to-digital converter.

11. The method according to claim 10 , wherein the determining comprises:

determining that a first analog gain is to be applied in a case where the rate of change of the signal exceeds the first predetermined threshold, and

determining that a second analog gain is to be applied in a case where the rate of change of the signal does not exceed the first predetermined threshold.

12. The method according to claim 11 , wherein the resistor is a variable resistor, the method further comprising:

setting a resistance of the resistor to a first value by the adaptive gain control determination circuit, in a case that the first analog gain is to be applied, and

setting the resistance of the resistor to a second value by the adaptive gain control determination circuit, in a case where the second analog gain is to be applied.

13. The method according to claim 11 , wherein the first analog gain is a gain of 1, and the second analog gain is a gain of G, where G>1.

14. The method according to claim 13 , wherein the first predetermined threshold is a dynamic range of the pixel divided by G.

15. The method according to claim 10 , wherein the second sample-and-hold circuit includes a switched capacitor comparator circuit and a threshold shifter circuit configured to shift a threshold of the switched capacitor comparator circuit.

16. The method according to claim 10 , further comprising:

determining whether the rate of change of the signal from the pixel exceeds a second predetermined threshold by a black sun spot determination circuit based on the output of the second sample-and hold circuit at a timing different from a timing of the adaptive gain control determination circuit.

17. The method according to claim 16 , wherein the second sample-and-hold circuit includes a switched capacitor comparator circuit, a first threshold shifter circuit configured to shift a threshold of the switched capacitor comparator circuit, and a second threshold shifter circuit configured to shift the threshold of the switched capacitor comparator circuit.

18. The method according to claim 17 , wherein the first threshold shifter circuit and the second threshold shifter circuit are connected in series.

19. An imaging device, comprising:

a pixel including a photoelectric conversion device configured to convert an incident light into an analog signal; and

an image processing circuit, including:

a first sample-and-hold circuit configured to sample a first data from the pixel,

a second sample-and-hold circuit configured to sample a second data from the pixel,

a voltage-to-current circuit including a resistor and a current source, and configured to receive the first data and the second data and output a difference data,

an adaptive gain control determination circuit configured to determine whether a rate of change of the analog signal from the pixel exceeds a predetermined threshold based on an output of the second sample-and-hold circuit, and

a current-mode analog-to-digital converter configured to convert the difference data from an analog form to a digital form.

20. The imaging device according to claim 19 , wherein

in a case where the rate of change of the signal exceeds the first predetermined threshold, the adaptive gain control determination circuit is configured to determine that a first analog gain is to be applied, and

in a case where the rate of change of the signal does not exceed the first predetermined threshold, the adaptive gain control determination circuit is configured to determine that a second analog gain is to be applied.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE ZIP CODE FROM 246-0014 TO 243-0014 PREVIOUSLY RECORDED AT REEL: 039645 FRAME: 0019. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Dec 13, 2016
From: SONY CORPORATION
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 040894/0926 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 10, 2016
From: SONY CORPORATION
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 039645/0019 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 2, 2015
From: ESHEL, NOAM; ZEITUNI, GOLAN
To: SONY CORPORATION
Reel/Frame 037193/0040 →