IP Library Granted Patent US 9,313,009
Granted Patent B2
US 9,313,009 · App. 14/935,217 · Granted Apr 12, 2016

Radio communication apparatus and radio communication method

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Quick Facts
Patent No.
US 9,313,009
App. No.
14/935,217
Granted
Apr 12, 2016
Kind
B2
Abstract

Provided is a radio communication device which can make Acknowledgement (ACK) reception quality and Negative Acknowledgement (NACK) reception quality to be equal to each other. The device includes: a scrambling unit ( 214 ) which multiplies a response signal after modulated, by a scrambling code “1” or “e −j(π/2) ” so as to rotate a constellation for each of response signals on a cyclic shift axis; a spread unit ( 215 ) which performs a primary spread of the response signal by using a Zero Auto Correlation (ZAC) sequence set by a control unit ( 209 ); and a spread unit ( 218 ) which performs a secondary spread of the response signal after subjected to the primary spread, by using a block-wise spread code sequence set by the control unit ( 209 ).

Claims (23)

1. A device comprising:

circuitry that multiplies a symbol representing an Acknowledgment (ACK) or Negative Acknowledgement (NACK) with a sequence defined by one of a plurality of cyclic shift values, that spreads the symbol using one of a plurality of orthogonal sequences, and that scrambles the symbol by a scrambling code, said one of the plurality of cyclic shift values and said one of the plurality of orthogonal sequences being determined from an index of a resource to which a physical uplink control channel is mapped, the scrambling code being e j(π/2) when the index is odd, and the scrambling code being 1 when the index is even; and

a transmitter that transmits the multiplied, spread and scrambled symbol on the physical uplink control channel.

2. The device according to claim 1 , wherein said circuitry scrambles the symbol depending on said one of the plurality of cyclic shift values.

3. The device according to claim 1 , wherein said circuitry scrambles the symbol depending on the sequence defined by said one of the plurality of cyclic shift values.

4. The device according to claim 1 , wherein the scrambling code is e j(π/2) when the resource is one of two resources, and the scrambling code is 1 when the resource is the other of said two resources, said two resources being respectively associated with two cyclic shift values of the plurality of cyclic shift values, and a difference between said two cyclic shift values being a given value.

5. The device according to claim 1 , wherein the scrambling code is e j(π/2) when the resource is one of two resources, and the scrambling code is 1 when the resource is the other of said two resources, said two resources being associated with one of the plurality of orthogonal sequences and being respectively associated with two cyclic shift values of the plurality of cyclic shift values, and a difference between said two cyclic shift values being a given value.

6. A device comprising:

circuitry that multiplies a symbol representing an Acknowledgment (ACK) or Negative Acknowledgement (NACK) with a sequence defined by one of a plurality of cyclic shift values, said one of the plurality of cyclic shift values being determined from an index of a resource to which a physical uplink control channel is mapped, and that scrambles the symbol by a scrambling code, the scrambling code being e j(π/2) when the resource is one of two resources, the scrambling code being 1 when the resource is the other of said two resources, said two resources being respectively associated with two cyclic shift values of the plurality of cyclic shift values, and a difference between said two cyclic shift values being a given value; and

a transmitter that transmits the multiplied and scrambled symbol on the physical uplink control channel.

7. The device according to claim 6 , wherein said circuitry scrambles the symbol depending on said one of the plurality of cyclic shift values.

8. The device according to claim 6 , wherein said circuitry scrambles the symbol depending on the sequence defined by said one of the plurality of cyclic shift values.

9. The device according to claim 6 , wherein said circuitry further multiplies the symbol with one of a plurality of orthogonal sequences, said one of the plurality of orthogonal sequences being determined from the index.

10. The device according to claim 9 , wherein said two resources are associated with one of the plurality of orthogonal sequences.

11. A method comprising:

multiplying a symbol representing an Acknowledgment (ACK) or Negative Acknowledgement (NACK) with a sequence defined by one of a plurality of cyclic shift values

spreading the symbol using one of a plurality of orthogonal sequences;

scrambling the symbol by a scrambling code, said one of the plurality of cyclic shift values and said one of the plurality of orthogonal sequences being determined from an index of a resource to which a physical uplink control channel is mapped, the scrambling code being e j(π/2) when the index is odd, and the scrambling code being 1 when the index is even; and

transmitting the multiplied, spread and scrambled symbol on the physical uplink control channel.

12. A method comprising:

multiplying a symbol representing an Acknowledgment (ACK) or Negative Acknowledgement (NACK) with a sequence defined by one of a plurality of cyclic shift values, said one of the plurality of cyclic shift values being determined from an index of a resource to which a physical uplink control channel is mapped;

scrambling the symbol by a scrambling code, the scrambling code being e j(π/2) when the resource is one of two resources, the scrambling code being 1 when the resource is the other of said two resources, said two resources being respectively associated with two cyclic shift values of the plurality of cyclic shift values, and a difference between said two cyclic shift values being a given value; and

transmitting the multiplied and scrambled symbol on the physical uplink control channel.

Assignments (2)
CHANGE OF NAME Recorded May 9, 2022
From: PANASONIC CORPORATION
To: PANASONIC HOLDINGS CORPORATION
Reel/Frame 060119/0989 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 3, 2016
From: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
To: PANASONIC CORPORATION
Reel/Frame 039551/0064 →