IP Library Granted Patent US 9,733,911
Granted Patent B2
US 9,733,911 · App. 14/938,649 · Granted Aug 15, 2017

Value transfer between program variables using dynamic memory resource mapping

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Quick Facts
Patent No.
US 9,733,911
App. No.
14/938,649
Granted
Aug 15, 2017
Kind
B2
Abstract

System and method for creating a program. A program may be compiled, including determining one or more value transfer operations in the program. Each value transfer operation may specify a value transfer between a respective one or more source variables and a destination variable. For each of the one or more value transfer operations, the value transfer operation may be implemented, where the implementation of the value transfer operation may be executable to assign each variable of the value transfer operation to a respective memory resource, thereby mapping the variables to the memory resources, and dynamically change the mapping, including assigning the destination variable to the memory resource of a first source variable of the one or more source variables, thereby transferring the value from the first source variable to the destination variable without copying the value between the memory resources.

Claims (97)

1. A non-transitory computer accessibly memory medium that stores program instructions executable by a functional unit to perform:

compiling a program, comprising:

determining one or more value transfer operations in the program, wherein each value transfer operation specifies a value transfer between a respective one or more source variables and a destination variable;

for each of the one or more value transfer operations:

implementing the value transfer operation, wherein the implementation of the value transfer operation is executable to perform:

assigning each variable of the value transfer operation to a respective memory resource, thereby mapping the variables to the memory resources; and

dynamically changing the mapping, including assigning the destination variable to the memory resource of a first source variable of the one or more source variables, thereby transferring the value from the first source variable to the destination variable without copying the value between the memory resources.

2. The non-transitory computer accessibly memory medium of claim 1 , wherein said compiling the program further comprises:

specifying a respective memory resource for each of the source variables and the destination variable.

3. The non-transitory computer accessibly memory medium of claim 2 ,

wherein said compiling the program further comprises:

creating a memory resource mapping manager, configured to assign a mapping of the source variables and the destination variable to their respective memory resources at runtime; and

wherein the implementation of the program comprises an implementation of the memory resource mapping manager, and wherein references to the source variables and the destination variable in the implementation of the program are replaced with respective memory resource lookup operations.

4. The non-transitory computer accessibly memory medium of claim 3 ,

wherein the implementation of the memory resource mapping manager is configured to perform at runtime:

assigning a respective specified memory resource to each of the source variables and the destination variable, including assigning a first memory resource to the destination variable and assigning one or more second memory resources to the one or more source variables, respectively; and

for each value transfer operation, executing the value transfer operation, comprising:

changing the mapping, comprising:

assigning the memory resource of a first source variable of the one or more source variables to the destination variable, thereby transferring the value of the first source variable to the destination variable without copying the value between the memory resources.

5. The non-transitory computer accessibly memory medium of claim 4 , wherein the program instructions are further executable to perform:

deploying the implementation of the program to a hardware device, wherein the deployed implementation is executable on the hardware device to perform:

assigning, by the implementation of the memory resource mapping manager, the respective specified memory resource to each of the one or more source variables and the destination variable, including said assigning a first memory resource to the destination variable and said assigning one or more second memory resources to the one or more source variables, respectively; and

executing, by the implementation of the memory resource mapping manager, the value transfer operation, comprising:

changing the mapping, comprising:

assigning the memory resource of the first source variable of the one or more source variables to the destination variable, wherein said assigning the memory resource transfers the value of the first source variable to the destination variable without copying the value between the memory resources.

6. The non-transitory computer accessibly memory medium of claim 3 , wherein the memory resource mapping manager is implemented as one or more of:

a finite state machine (FSM);

one hot counter;

a binary counter;

a scoreboard; or

a program executed on an embedded core.

7. The non-transitory computer accessibly memory medium of claim 1 , wherein said compiling the program further comprises:

analyzing effects of said dynamically changing the mapping on each value transfer operation with respect to performance improvement and/or resource cost; and

determining value transfer operations used in said dynamically changing the mapping that achieve a specified timing and/or resource constraint.

8. The non-transitory computer accessibly memory medium of claim 1 , wherein said determining one or more value transfer operations in the program is based on estimation of performance improvement and/or resource cost that is achievable by implementing said value transfer operations via said dynamically changing the mapping.

9. The non-transitory computer accessibly memory medium of claim 1 , wherein at least one of the value transfer operations is static.

10. The non-transitory computer accessibly memory medium of claim 1 , wherein at least one of the value transfer operations is dynamic.

11. The non-transitory computer accessibly memory medium of claim 1 , wherein at least one of the one or more source variables or the destination variable is shared by two or more program structures.

12. The non-transitory computer accessibly memory medium of claim 1 , wherein each of the source variables and the destination variable has a respective data type comprising one or more of:

a numeric data type;

an array;

a cluster;

an array of clusters;

a struct;

an array of structs; or

a nested data type.

13. The non-transitory computer accessibly memory medium of claim 1 , wherein each memory resource comprises one or more of:

block random access memory (RAM) on a field programmable gate array (FPGA);

distributed RAM on the FPGA;

flip flop on the FPGA or an application specific integrated circuit (ASIC);

dynamic RAM (DRAM); or

solid-state drive (SSD).

14. A computer-implemented method for creating a program, the method comprising:

compiling a program, comprising:

determining one or more value transfer operations in the program, wherein each value transfer operation specifies a value transfer between a respective one or more source variables and a destination variable;

for each of the one or more value transfer operations:

implementing the value transfer operation, wherein the implementation of the value transfer operation is executable to perform:

assigning each variable of the value transfer operation to a respective memory resource, thereby mapping the variables to the memory resources; and

dynamically changing the mapping, including assigning the destination variable to the memory resource of a first source variable of the one or more source variables, thereby transferring the value from the first source variable to the destination variable without copying the value between the memory resources.

15. The computer-implemented method of claim 14 , wherein said compiling the program further comprises:

specifying a respective memory resource for each of the one or more source variables and the destination variable.

16. The computer-implemented method of claim 15 ,

wherein said compiling the program further comprises:

creating a memory resource mapping manager, configured to assign a mapping of the one or more source variables and the destination variable to their respective memory resources at runtime; and

wherein the implementation of the program comprises an implementation of the memory resource mapping manager, and wherein references to the source variables and the destination variable in the implementation of the program are replaced with respective memory resource lookup operations.

17. The computer-implemented method of claim 16 ,

wherein the implementation of the memory resource mapping manager is configured to perform at runtime:

assigning a respective specified memory resource to each of the one or more source variables and the destination variable, including assigning a first memory resource to the destination variable and assigning one or more second memory resources to the one or more source variables, respectively; and

for each value transfer operation, executing the value transfer operation, comprising:

changing the mapping, comprising:

assigning the memory resource of a first source variable of the one or more source variables to the destination variable, thereby transferring the value of the first source variable to the destination variable without copying the value between the memory resources.

18. The computer-implemented method of claim 17 , further comprising:

deploying the implementation of the program to a hardware device; and

executing the implementation of the program on the hardware device, comprising:

assigning, by the implementation of the memory resource mapping manager, the respective specified memory resource to each of the one or more source variables and the destination variable, including said assigning a first memory resource to the destination variable and said assigning one or more second memory resources to the one or more source variables, respectively; and

executing, by the implementation of the memory resource mapping manager, the value transfer operation, comprising:

changing the mapping, comprising:

assigning the memory resource of the first source variable of the one or more source variables to the destination variable, wherein said assigning the memory resource transfers the value of the first source variable to the destination variable without copying the value between the memory resources.

19. The computer-implemented method of claim 16 , wherein the memory resource mapping manager is implemented as one or more of:

a finite state machine (FSM);

one hot counter;

a binary counter;

a scoreboard; or

a program executed on an embedded core.

20. The computer-implemented method of claim 14 , wherein said compiling the program further comprises:

analyzing effects of said dynamically changing the mapping on each value transfer operation with respect to performance improvement and/or resource cost; and

determining value transfer operations used in said dynamically changing the mapping that achieve a specified timing and/or resource constraint.

21. The computer-implemented method of claim 14 , wherein said determining one or more value transfer operations in the program is based on estimation of performance improvement and/or resource cost that is achievable by implementing said value transfer operations via said dynamically changing the mapping.

22. The computer-implemented method of claim 14 , wherein at least one of the value transfer operations is static.

23. The computer-implemented method of claim 14 , wherein at least one of the value transfer operations is dynamic.

24. The computer-implemented method of claim 14 , wherein at least one of the one or more source variables or the destination variable is shared by two or more program structures.

25. The computer-implemented method of claim 14 , wherein each memory resource comprises one or more of:

block random access memory (RAM) on a field programmable gate array (FPGA);

distributed RAM on the FPGA;

flip flop on the FPGA or an application specific integrated circuit (ASIC);

dynamic RAM (DRAM); or

solid-state drive (SSD).

Assignments (5)
RELEASE OF SECURITY INTEREST IN PATENTS (REEL/FRAME 057280/0028) Recorded Oct 13, 2023
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
To: NATIONAL INSTRUMENTS CORPORATION
Reel/Frame 065231/0466 →
RELEASE OF SECURITY INTEREST IN PATENTS (REEL/FRAME 052935/0001) Recorded Oct 13, 2023
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
To: NATIONAL INSTRUMENTS CORPORATION; PHASE MATRIX, INC.
Reel/Frame 065653/0463 →
SECURITY INTEREST Recorded Jun 18, 2021
From: NATIONAL INSTRUMENTS CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 057280/0028 →
SECURITY INTEREST Recorded Jun 14, 2020
From: NATIONAL INSTRUMENTS CORPORATION; PHASE MATRIX, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 052935/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 11, 2015
From: KEE, HOJIN; LY, TAI A.; ULIANA, DAVID C.; ARNESEN, ADAM T.; PETERSEN, NEWTON G.
To: NATIONAL INSTRUMENTS CORPORATION
Reel/Frame 037017/0178 →