IP Library Patent Application 14943300
Patent Application
App. No. 14/943,300

SYSTEMS AND METHODS FOR FORMING MEMS ASSEMBLIES INCORPORATING GETTERS

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Patent No.
US None
App. No.
14/943,300
Abstract

Systems and methods for forming MEMS assemblies incorporating getters are described. One such method for forming and bonding to a microelectromechanical systems (MEMS) assembly includes providing a first MEMS wafer including a metal layer on an inner surface and one or more cavities for forming a MEMS component, attaching a MEMS capping wafer, having at least one through hole via, to the inner surface of the first MEMS wafer thereby forming at least one encapsulated MEMs component within the first MEMS wafer, and bonding a wire to the metal layer through an open end of the at least one through hole via.

Claims (37)

1 . A method for manufacturing a wafer of a microelectromechanical systems (MEMS) assembly, the method comprising:

providing the wafer comprising a buried oxide layer;

depositing and patterning a first photo resist layer on the wafer;

performing reactive ion etching on a surface of the wafer, the ion etching extending to the buried oxide layer;

removing the first photo resist layer;

removing portions of the buried oxide layer, thereby forming one or more cavities within the wafer;

depositing a first metal layer configured to act as a getter within the one or more cavities; and

depositing a second metal layer on the first metal layer.

2 . The method of claim 1 , wherein the second metal layer is configured to form one or more conductive pads within the one or more cavities.

3 . The method of claim 1 , wherein the performing reactive ion etching on the surface of the wafer comprises performing deep reactive ion etching on the surface of the wafer in accordance with the patterned first photo resist layer.

4 . The method of claim 1 , wherein the first metal layer comprises a metal selected from the group consisting of Ti and Cr.

5 . The method of claim 1 , wherein the second metal layer comprises Au.

6 . The method of claim 1 , wherein a thickness of the first metal layer is about 1/10 to about 1 times a thickness of the buried oxide layer.

7 . The method of claim 1 , wherein the removing portions of the buried oxide layer comprises performing acid etching on the wafer, wherein the acid comprises one of an aqueous acid or a vapor acid.

8 . A method for manufacturing a cap for a microelectromechanical systems (MEMS) assembly, the method comprising:

providing a cap wafer;

depositing a layer of oxide on the cap wafer;

depositing and patterning a first photo resist layer on the oxide layer;

removing portions of the oxide layer in accordance with the patterned first photo resist layer;

removing the first photo resist layer;

depositing one or more first metal layers on the cap wafer;

depositing and patterning a second photo resist layer on the one or more first metal layers;

removing portions of the one or more first metal layers in accordance with the patterned second photo resist layer;

removing the second photo resist layer;

depositing and patterning a third photo resist layer on the cap wafer;

removing portions of the cap wafer in accordance with the oxide layer and the third photo resist layer to form one or more through hole vias; and

removing the third photo resist layer.

9 . The method of claim 8 , wherein the depositing the one or more first metal layers on the cap wafer comprises:

depositing a first metal layer configured to act as a getter; and

depositing a second metal layer on the first metal layer.

10 . The method of claim 9 , wherein the first metal layer comprises a metal selected from the group consisting of Ti and Cr.

11 . The method of claim 10 , wherein the second metal layer comprises Au.

12 . The method of claim 8 :

wherein the removing the first photo resist layer further comprises removing at least one portion of the cap wafer thereby forming at least one cavity,

wherein the removing the portions of the one or more first metal layers in accordance with the patterned second photo resist layer comprises removing the one or more first metal layers from the at least one cavity, and

wherein the depositing and patterning the third photo resist layer on the cap wafer comprises depositing the third photo resist layer in the at least one cavity.

13 . The method of claim 8 , wherein the remaining portions of the one or more first metal layers comprise one or more conductive pads.

Assignments (7)
RELEASE OF SECURITY INTEREST AT REEL 038710 FRAME 0845 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL (FREMONT), LLC; WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058965/0445 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 19, 2019
From: WESTERN DIGITAL (FREMONT), LLC
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 050450/0582 →
RELEASE OF SECURITY INTEREST Recorded Mar 5, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: WESTERN DIGITAL (FREMONT), LLC
Reel/Frame 045501/0158 →
SECURITY AGREEMENT Recorded May 16, 2016
From: WESTERN DIGITAL (FREMONT), LLC
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038744/0755 →
SECURITY AGREEMENT Recorded May 16, 2016
From: WESTERN DIGITAL (FREMONT), LLC
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038710/0845 →
SECURITY AGREEMENT Recorded May 16, 2016
From: WESTERN DIGITAL (FREMONT), LLC
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038744/0675 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 13, 2016
From: MONADGEMI, PEZHMAN; WANG, LEI
To: WESTERN DIGITAL (FREMONT), LLC
Reel/Frame 037475/0596 →