IP Library Granted Patent US 9,766,948
Granted Patent B2
US 9,766,948 · App. 14/948,277 · Granted Sep 19, 2017

Selecting processor micro-threading mode

Inventor: Paul Mackerras (Weston, AU)
Assignee: International Business Machines Corporation
G06F9/5083G06F9/45558G06F2009/45575
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Quick Facts
Patent No.
US 9,766,948
App. No.
14/948,277
Granted
Sep 19, 2017
Kind
B2
Abstract

An approach is provided to dynamically select a micro-threading (MT) mode of each core of a processor based on a load on each of the respective cores while the processor is running a hypervisor. The approach sets a core's micro-threading mode to a whole-core mode (MT 1 ) in response to identifying that the load on the selected core is at a light load level, sets the core's micro-threading mode to a two-way micro-threading mode (MT 2 ) in response to identifying that the load on the selected core has increased above the light load level, and sets the selected core's micro-threading mode to a four-way micro-threading mode (MT 4 ) in response to identifying that the load on the selected core is at a high load level.

Claims (25)

1. A method that dynamically selects a micro-threading (MT) mode of each core of a processor based on a load on each of the respective cores while the processor is running a hypervisor, the method comprising:

dynamically setting a selected core's micro-threading mode to a whole-core mode (MT 1 ) in response to identifying that the load on the selected core is at a first load level;

dynamically setting the selected core's micro-threading mode to a two-way micro-threading mode (MT 2 ) in response to identifying that the load on the selected core has increased above the first load level to a second load level;

dynamically setting the selected core's micro-threading mode to a four-way micro-threading mode (MT 4 ) in response to identifying that the load on the selected core has increased above the second load level to a third load level;

entering a quest context after the setting of the micro-threading mode; and

switching the micro-threading mode of the selected core to the whole-core mode (MT 1 ) upon the selected core exiting from the guest context.

2. The method of claim 1 further comprising:

selecting a primary virtual core to execute on the selected core;

scanning a plurality of preempted virtual cores; and

selecting one or more of the preempted virtual cores to execute as secondary virtual cores along with the primary virtual core.

3. The method of claim 2 further comprising:

selecting the micro-threading mode based on the selection of the secondary virtual cores.

4. The method of claim 3 further comprising:

in response to a task executing on the primary virtual core requiring a service from a host process:

placing the task on a preempted virtual cores list corresponding to a current CPU; and

selecting a different task to execute on the primary virtual core.

5. The method of claim 4 further comprising:

performing the service by the host process on the task; and

removing the task from the preempted virtual cores list.

6. The method of claim 3 further comprising:

performing any needed service in a host process in response to exiting from the guest context; and

for each virtual CPU (vCPU) task scheduled to execute on the selected virtual core:

add an entry to a vCore data structure pertaining to each vCPU task that is ready to execute on the selected virtual core;

selecting one of the vCPU tasks as the runner task for the selected virtual core, wherein the runner task executes on the primary virtual core; and

selecting one or more of the vCPU tasks as tasks to execute concurrently with the runner task on the selected virtual core.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 21, 2015
From: MACKERRAS, PAUL
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 037110/0421 →
Continuity (2)
Continuation 14938011 · Nov 11, 2015
Related Publication 20170132050A1 · May 11, 2017