IP Library Granted Patent US 9,325,350
Granted Patent B2
US 9,325,350 · App. 14/949,348 · Granted Apr 26, 2016

Multiple size and rate forward error correction (FEC) code combination with minimum shortening and maximum combined code rate

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Quick Facts
Patent No.
US 9,325,350
App. No.
14/949,348
Filed
Nov 23, 2015
Granted
Apr 26, 2016
Kind
B2
Art Unit
2117
USPC
714/776
Abstract

A communication device is configured to encode information bits using one or more forward error correction (FEC) codes and/or error correction codes (ECCs) to generate different codewords (e.g., codeword groups having different lengths, based on different code rates, etc.). The device generates a combined codeword using different sized codewords (e.g., long, medium, and short) by filling fills long codewords completely if possible, then filling medium codewords completely if possible with the remaining message bits (if any), and filling short codewords completely if possible plus another additional short codeword with the remaining message bits (if any). If the total number of short (or medium and short) codeword parity bits is greater than or equal to the number of medium (or long) codeword parity bits, then the device increments the number of medium (or long) codewords by one and setting the number of short (or medium and short) codewords to zero.

Claims (87)

1. A communication device comprising:

a communication interface; and

a processor configured to:

encode first information using a first code having a first code rate to generate first codewords having a first size;

shorten the first codewords to generate first shortened codewords having a first shortened size;

encode second information using a second code having a second code rate to generate second codewords having a second size that is less than the first size;

shorten the second codewords to generate second shortened codewords having a second shortened size;

encode third information using a third code having a third code rate to generate third codewords having a third size that is less than the second size;

shorten the third codewords to generate third shortened codewords having a third shortened size;

generate an orthogonal frequency division multiple access (OFDMA) frame that includes a combined codeword having a predetermined size;

generate the combined codeword using a first subset of the first codewords when the predetermined size is a positive integer multiple of the first size; and

generate, when the predetermined size is not the positive integer multiple of the first size, the combined codeword using a second subset of the first codewords that fill the predetermined size as completely as possible within the predetermined size that leaves one or more remaining message bits within the predetermined size and fill at least one of the first shortened codewords, the second codewords, the second shortened codewords, the third codewords, or the third shortened codewords within the one or more remaining message bits; and

transmit, via the communication interface, the OFDMA frame to another communication device.

2. The communication device of claim 1 , wherein the processor is further configured to:

generate, when the predetermined size is not the positive integer multiple of the first size, the combined codeword using the second subset of the first codewords and a first subset of the first shortened codewords when the one or more remaining message bits is greater than or equal to a positive integer multiple of the first shortened size.

3. The communication device of claim 1 , wherein the processor is further configured to:

generate, when the predetermined size is not the positive integer multiple of the first size, the combined codeword using the second subset of the first codewords and at least one of the first shortened codewords followed by at least one of the second codewords, the second shortened codewords, the third codewords, or the third shortened codewords within the one or more remaining message bits.

4. The communication device of claim 1 , wherein the processor is further configured to:

generate, when the predetermined size is not the positive integer multiple of the first size, the combined codeword using the second subset of the first codewords and at least one of the first shortened codewords followed by at least one of the second codewords followed by at least one of the second shortened codewords, the third codewords, or the third shortened codewords within the one or more remaining message bits.

5. The communication device of claim 1 , wherein the processor is further configured to:

generate, when the predetermined size is not the positive integer multiple of the first size, the combined codeword using the second subset of the first codewords and at least one of the first shortened codewords followed by at least one of the second codewords followed by at least one of the second shortened codewords followed by at least one of the third codewords or the third shortened codewords within the one or more remaining message bits.

6. The communication device of claim 1 , wherein the processor is further configured to generate the combined codeword by:

filling the combined codeword with the first codewords as completely as possible;

when the combined codeword includes the one or more remaining message bits after filling the combined codeword with the first codewords as completely as possible, filling the combined codeword with the second codewords as completely as possible;

when the combined codeword includes additional one or more remaining message bits after filling the combined codeword with the second codewords as completely as possible, filling the combined codeword with the third codewords as completely as possible;

when parity bits generated by the second code are greater than or equal to parity bits generated by the first code within the combined codeword, modify the combined codeword by increasing a number of the second codewords by one and excluding any third codewords from the combined codeword; and

when parity bits generated by the second code and the third code are greater than or equal to parity bits generated by the first code within the combined codeword, modify the combined codeword by increasing a number of the first codewords by one and excluding any second and third codewords from the combined codeword.

7. The communication device of claim 1 , wherein the processor is further configured to:

encode the first information that includes 14440 information bits using the first code having the first code rate of 14400/16200 to generate the first codewords having the first size that is 16200 bits including the 14440 information bits;

encode the second information that includes 5040 information bits using the second code having the second code rate of 5040/5940 to generate the second codewords having the second size that is 5940 bits including the 5040 information bits; and

encode the third information that includes 840 information bits using the third code having the third code rate of 840/1120 to generate the third codewords having the third size that is 1120 bits including the 840 information bits.

8. The communication device of claim 1 , wherein the processor is further configured to perform encoding using:

the first code that is based on a first low density parity check (LDPC) code that is characterized by a first LDPC matrix that includes a first plurality of sub-matrices, wherein a first right hand side matrix of the first plurality of sub-matrices is lower triangular and includes all-zero-valued sub-matrices except for first CSI (Cyclic Shifted Identity) sub-matrices located on a main diagonal of the first right hand side matrix and another diagonal that is adjacently located to left of the main diagonal of the first right hand side matrix;

the second code that is based on a second LDPC code that is characterized by a second LDPC matrix that includes a second plurality of sub-matrices, wherein a second right hand side matrix of the second plurality of sub-matrices is lower triangular and includes all-zero-valued sub-matrices except for second CSI sub-matrices located on a main diagonal of the second right hand side matrix and another diagonal that is adjacently located to left of the main diagonal of the second right hand side matrix; and

the third code that is based on a third LDPC code that is characterized by a third LDPC matrix that includes a third plurality of sub-matrices, wherein a third right hand side matrix of the third plurality of sub-matrices is lower triangular and includes all-zero-valued sub-matrices except for third CSI sub-matrices located on a main diagonal of the third right hand side matrix and another diagonal that is adjacently located to left of the main diagonal of the third right hand side matrix.

9. The communication device of claim 1 , wherein the communication interface is further configured to:

support communications within at least one of a satellite communication system, a wireless communication system, a wired communication system, a fiber-optic communication system, or a mobile communication system.

10. A communication device comprising:

a communication interface; and

a processor configured to:

encode first information using a first code having a first code rate to generate first codewords having a first size;

encode second information using a second code having a second code rate to generate second codewords having a second size that is less than the first size;

encode third information using a third code having a third code rate to generate third codewords having a third size that is less than the second size;

generate an orthogonal frequency division multiple access (OFDMA) frame that includes a combined codeword having a predetermined size;

generate the combined codeword using a first subset of the first codewords when the predetermined size is a positive integer multiple of the first size;

generate, when the predetermined size is not the positive integer multiple of the first size, the combined codeword using a second subset of the first codewords that fill the predetermined size as completely as possible within the predetermined size that leaves one or more remaining message bits within the predetermined size and fill at least one of the second codewords, or the third codewords within the one or more remaining message bits; and

transmit, via the communication interface, the OFDMA frame to another communication device.

11. The communication device of claim 10 , wherein the processor is further configured to:

shorten the first codewords to generate first shortened codewords having a first shortened size;

shorten the second codewords to generate second shortened codewords having a second shortened size;

shorten the third codewords to generate third shortened codewords having a third shortened size; and

generate, when the predetermined size is not the positive integer multiple of the first size, the combined codeword using the second subset of the first codewords that fill the predetermined size as completely as possible within the predetermined size that leaves one or more remaining message bits within the predetermined size and fill at least one of the first shortened codewords, the second codewords, the second shortened codewords, the third codewords, or the third shortened codewords within the one or more remaining message bits.

12. The communication device of claim 10 , wherein the processor is further configured to:

encode the first information that includes 14440 information bits using the first code having the first code rate of 14400/16200 to generate the first codewords having the first size that is 16200 bits including the 14440 information bits;

encode the second information that includes 5040 information bits using the second code having the second code rate of 5040/5940 to generate the second codewords having the second size that is 5940 bits including the 5040 information bits; and

encode the third information that includes 840 information bits using the third code having the third code rate of 840/1120 to generate the third codewords having the third size that is 1120 bits including the 840 information bits.

13. The communication device of claim 10 , wherein the processor is further configured to perform encoding using:

the first code that is based on a first low density parity check (LDPC) code that is characterized by a first LDPC matrix that includes a first plurality of sub-matrices, wherein a first right hand side matrix of the first plurality of sub-matrices is lower triangular and includes all-zero-valued sub-matrices except for first CSI (Cyclic Shifted Identity) sub-matrices located on a main diagonal of the first right hand side matrix and another diagonal that is adjacently located to left of the main diagonal of the first right hand side matrix;

the second code that is based on a second LDPC code that is characterized by a second LDPC matrix that includes a second plurality of sub-matrices, wherein a second right hand side matrix of the second plurality of sub-matrices is lower triangular and includes all-zero-valued sub-matrices except for second CSI sub-matrices located on a main diagonal of the second right hand side matrix and another diagonal that is adjacently located to left of the main diagonal of the second right hand side matrix; and

the third code that is based on a third LDPC code that is characterized by a third LDPC matrix that includes a third plurality of sub-matrices, wherein a third right hand side matrix of the third plurality of sub-matrices is lower triangular and includes all-zero-valued sub-matrices except for third CSI sub-matrices located on a main diagonal of the third right hand side matrix and another diagonal that is adjacently located to left of the main diagonal of the third right hand side matrix.

14. The communication device of claim 10 , wherein the communication interface is further configured to:

support communications within at least one of a satellite communication system, a wireless communication system, a wired communication system, a fiber-optic communication system, or a mobile communication system.

15. A method for execution by a communication device, the method comprising:

encoding first information using a first code having a first code rate to generate first codewords having a first size;

encoding second information using a second code having a second code rate to generate second codewords having a second size that is less than the first size;

encoding third information using a third code having a third code rate to generate third codewords having a third size that is less than the second size;

encoding an orthogonal frequency division multiple access (OFDMA) frame that includes a combined codeword having a predetermined size;

generating the combined codeword using a first subset of the first codewords when the predetermined size is a positive integer multiple of the first size; and

generating, when the predetermined size is not the positive integer multiple of the first size, the combined codeword using a second subset of the first codewords that fill the predetermined size as completely as possible within the predetermined size that leaves one or more remaining message bits within the predetermined size and fill at least one of the second codewords, or the third codewords within the one or more remaining message bits; and

transmitting, via a communication interface of the communication device, the OFDMA frame to another communication device.

16. The method of claim 15 further comprising:

shortening the first codewords to generate first shortened codewords having a first shortened size;

shortening the second codewords to generate second shortened codewords having a second shortened size;

shortening the third codewords to generate third shortened codewords having a third shortened size; and

generating, when the predetermined size is not the positive integer multiple of the first size, the combined codeword using the second subset of the first codewords that fill the predetermined size as completely as possible within the predetermined size that leaves one or more remaining message bits within the predetermined size and fill at least one of the first shortened codewords, the second codewords, the second shortened codewords, the third codewords, or the third shortened codewords within the one or more remaining message bits.

17. The method of claim 16 further comprising:

generating, when the predetermined size is not the positive integer multiple of the first size, the combined codeword using the second subset of the first codewords and a first subset of the first shortened codewords when the one or more remaining message bits is greater than or equal to a positive integer multiple of the first shortened size.

18. The method of claim 16 further comprising:

generate, when the predetermined size is not the positive integer multiple of the first size, the combined codeword using the second subset of the first codewords and at least one of the first shortened codewords followed by at least one of the second codewords followed by at least one of the second shortened codewords followed by at least one of the third codewords or the third shortened codewords within the one or more remaining message bits.

19. The method of claim 15 further comprising:

encode the first information that includes 14440 information bits using the first code having the first code rate of 14400/16200 to generate the first codewords having the first size that is 16200 bits including the 14440 information bits;

encode the second information that includes 5040 information bits using the second code having the second code rate of 5040/5940 to generate the second codewords having the second size that is 5940 bits including the 5040 information bits; and

encode the third information that includes 840 information bits using the third code having the third code rate of 840/1120 to generate the third codewords having the third size that is 1120 bits including the 840 information bits.

20. The method of claim 15 further comprising performing encoding using:

the first code is based on a first low density parity check (LDPC) code that is characterized by a first LDPC matrix that includes a first plurality of sub-matrices, wherein a first right hand side matrix of the first plurality of sub-matrices is lower triangular and includes all-zero-valued sub-matrices except for first CSI (Cyclic Shifted Identity) sub-matrices located on a main diagonal of the first right hand side matrix and another diagonal that is adjacently located to left of the main diagonal of the first right hand side matrix;

the second code is based on a second LDPC code that is characterized by a second LDPC matrix that includes a second plurality of sub-matrices, wherein a second right hand side matrix of the second plurality of sub-matrices is lower triangular and includes all-zero-valued sub-matrices except for second CSI sub-matrices located on a main diagonal of the second right hand side matrix and another diagonal that is adjacently located to left of the main diagonal of the second right hand side matrix; and

the third code is based on a third LDPC code that is characterized by a third LDPC matrix that includes a third plurality of sub-matrices, wherein a third right hand side matrix of the third plurality of sub-matrices is lower triangular and includes all-zero-valued sub-matrices except for third CSI sub-matrices located on a main diagonal of the third right hand side matrix and another diagonal that is adjacently located to left of the main diagonal of the third right hand side matrix.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE PATENT NUMBER 9,385,856 TO 9,385,756 PREVIOUSLY RECORDED AT REEL: 47349 FRAME: 001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 22, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 051144/0648 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE PREVIOUSLY RECORDED ON REEL 047229 FRAME 0408. ASSIGNOR(S) HEREBY CONFIRMS THE THE EFFECTIVE DATE IS 09/05/2018. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047349/0001 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047229/0408 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 23, 2015
From: PRODAN, RICHARD STEPHEN
To: BROADCOM CORPORATION
Reel/Frame 037121/0835 →