Semiconductor device

1. A semiconductor device, comprising:

a first electrode;

a first insulating layer having a first opening reaching the first electrode and having a ring-shaped first side wall exposed to the first opening;

an oxide semiconductor layer on the first side wall, the oxide semiconductor layer being connected with the first electrode;

a gate insulating layer on the oxide semiconductor layer, the oxide semiconductor layer being between the first side wall and the gate insulating layer;

a gate electrode facing the oxide semiconductor layer on the first side wall, the gate insulating layer being between the oxide semiconductor layer and the gate electrode; and

a second electrode above the first insulating layer, the second electrode being connected with the oxide semiconductor layer;

further comprising: a second insulating layer above the first electrode, the first insulating layer, the oxide semiconductor layer and the gate insulating layer;

a fourth electrode connected with the first electrode; and

a fifth electrode connected with the gate electrode;

wherein: the fourth electrode is connected with the first electrode via a second opening in the second insulating layer;

the second electrode is connected with the oxide semiconductor layer via a third opening in the second insulating layer; and

the fifth electrode is connected with the gate electrode via a fourth opening in the second insulating layer.

2. The semiconductor device according to claim 1 , wherein the first side wall is tapered.

3. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer covers the first side wall.

4. The semiconductor device according to claim 1 , further comprising a third electrode between the first insulating layer and the oxide semiconductor layer above the first insulating layer.

5. The semiconductor device according to claim 4 , wherein the second electrode is connected with the oxide semiconductor layer on a side opposite to the third electrode.

6. The semiconductor device according to claim 4 , wherein the second electrode is connected with the oxide semiconductor layer via the third electrode.

7. The semiconductor device according to claim 1 , wherein the fourth electrode is connected with the first electrode via the second opening and a fifth opening in the first insulating layer.

8. The semiconductor device according to claim 1 , wherein:

a plurality of the first openings are located adjacent to each other; and

the first electrode, the second electrode and the gate electrode are common to the plurality of first openings.

9. The semiconductor device according to claim 1 , further comprising a ring-shaped third insulating layer surrounding the first insulating layer;

wherein:

the first insulating layer and the third insulating layer have a second side wall located to surround the first side wall; and

the gate electrode is located to face the first side wall and the second side wall.

10. A semiconductor device, comprising:

a first insulating layer having a ring-shaped first side wall;

an oxide semiconductor layer on the first side wall;

a gate insulating layer on the oxide semiconductor layer, the oxide semiconductor layer being between the first side wall and the gate insulating layer;

a gate electrode facing the oxide semiconductor layer on the first side wall, the gate insulating layer being between the oxide semiconductor layer and the gate electrode;

a first electrode below the first insulating layer, the first electrode being connected with a first portion of the oxide semiconductor layer; and

a second electrode above the first insulating layer, the second electrode being connected with a second portion of the oxide semiconductor layer;

further comprising: a second insulating layer above the gate electrode;

a fourth electrode connected with the first electrode; and

a fifth electrode connected with the gate electrode;

wherein: the fourth electrode is connected with the first electrode via a second opening in the second insulating layer;

the second electrode is connected with the oxide semiconductor layer via a third opening in the second insulating layer; and

the fifth electrode is connected with the gate electrode via a fourth opening in the second insulating layer.

11. The semiconductor device according to claim 10 , wherein the first side wall is tapered.

12. The semiconductor device according to claim 10 , wherein the oxide semiconductor layer covers the first side wall.

13. The semiconductor device according to claim 10 , further comprising a third electrode between the first insulating layer and the oxide semiconductor layer above the first insulating layer.

14. The semiconductor device according to claim 13 , wherein the second electrode is connected with the oxide semiconductor layer on a side opposite to the third electrode.

15. The semiconductor device according to claim 13 , wherein the second electrode is connected with the oxide semiconductor layer via the third electrode.

16. The semiconductor device according to claim 10 , wherein the fourth electrode is connected with the first electrode via the second opening and a fifth opening in the first insulating layer.

17. The semiconductor device according to claim 10 , wherein:

a plurality of the first side walls are located adjacent to each other; and

the first electrode, the second electrode and the gate electrode are common to the plurality of first side walls.

18. The semiconductor device according to claim 10 , further comprising a ring-shaped third insulating layer surrounding the first insulating layer;

wherein:

the first insulating layer and the third insulating layer have a second side wall located to surround the first side wall; and

the gate electrode is located to face the first side wall and the second side wall.