Array substrate and display device using the same
View Patent ↗An array substrate includes: a gate wiring; a source wiring, which is formed to intersect the gate wiring; a passivation film, which covers the source wiring; and a pixel electrode that is formed on the passivation film. The array substrate has a display area and a dummy pixel area. In the display area, a switching element in the vicinity of the intersection of the gate wiring and the source wiring is provided. In the display area, the pixel electrode and the source wiring do not have an overlapping area in a top view. The dummy pixel area is located outside the display area, and in the dummy pixel area, a dummy pixel electrode and two source wirings, which are adjacent to the dummy pixel electrode have an overlapping area in a top view.
1. An array substrate comprising:
gate wirings;
source wirings, which are formed to intersect the gate wirings with a gate insulating film interposed therebetween;
a passivation film, which covers the source wirings; and
a pixel electrode that is formed on the passivation film,
wherein the array substrate has a display area and a dummy pixel area,
wherein in the display area, a switching element in the vicinity of the intersection of the gate wirings and the source wirings is provided, and a drain electrode of the switching element and the pixel electrode are electrically connected to each other via a contact hole which is opened in the passivation film,
wherein in the display area, the pixel electrode and the source wirings do not have an overlapping area in a top view,
wherein the dummy pixel area is located outside the display area, and
wherein in the dummy pixel area a first dummy pixel electrode has a first overlapping area with a first one of the source wirings and a second overlapping area with a second one of the source wirings in a top view, both said first one and said second one of the source wirings being adjacent to the dummy pixel electrode.
2. The array substrate according to claim 1 ,
wherein the first dummy pixel electrode is formed to be larger than the pixel electrode.
3. The array substrate according to claim 1 ,
wherein a length of overlap of an overlapping area of the first and second overlapping areas is shorter than a pixel length of the dummy pixel electrode.
4. The array substrate according to claim 3 ,
wherein a first area in which the first dummy pixel electrode and one of the two source wirings overlap and a second area in which a second dummy pixel electrode adjacent to the first dummy pixel electrode and the same one of the two source wirings overlap are disposed on the same one of the two source wirings, and wherein the first area and the second area do not face each other on the same one of the two source wirings in a width direction of the source wirings.
5. The array substrate according to claim 1 ,
wherein a width of part of one of the two source wirings in the overlapping area is larger than a width thereof in an area other than the overlapping area.
6. The array substrate according to claim 1 ,
wherein the dummy pixel area includes another dummy pixel wherein in a dummy pixel electrode of the another dummy pixel does not overlap the source wiring.
7. A display device comprising
the array substrate according to claim 1 .